DP83936AVF datasheet(19/104 Pages) NSC

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30 Functional Description (Continued)

TLF12597 – 11

FIGURE 3-8 Receive FIFO

Threshold Logic enables the Buffer Management Engine to

read a programmed number of 16- or 32-bit words (depend-

ing upon the selected data width) from the FIFO and trans-

fer them to the system interface (the system memory) using

DMA The threshold is reached when the number of bytes in

the receive FIFO is greater than the value of the threshold

For example if the threshold is 4 words (8 bytes) then the

Threshold Logic will not cause the Buffer Management En-

gine to write to memory until there are more than 8 bytes in

the FIFO

The Buffer Management Engine reads either the upper or

lower half (16 bits) of the FIFO in 16-bit mode or reads the

complete long word (32 bits) in 32-bit mode If after the

transfer is complete the number of bytes in the FIFO is less

than the threshold then the SONIC-T is done This is al-

ways the case when the SONIC-T is in EmptyFill Mode If

however for some reason (eg

latency on the bus) the

number of bytes in the FIFO is still greater than the thresh-

old value the Threshold Logic will cause the Buffer Man-

agement Engine to do a DMA request to write to memory

again This latter case is usually only possible when the

SONIC-T is in Block Mode

When in Block Mode each time the SONIC-T requests the

bus only a number of bytes equal to the threshold value will

be transferred The Threshold Logic continues to monitor

the number of bytes written in from the deserializer and en-

ables the Buffer Management Engine every time the thresh-

old has been reached This process continues until the end

of the packet

Once the end of the packet has been reached the serializer

will fill out the last word (16-bit mode) or long word (32-bit

mode) if the last byte did not end on a word or long word

boundary respectively The fill byte will be 0FFh Immediate-

ly after the last byte (or fill byte) in the FIFO the received

packets status will be written into the FIFO The entire pack-

et including any fill bytes and the received packet status will

be buffered to memory When a packet is buffered to mem-

ory by the Buffer Management Engine it is always taken

from the FIFO in words or long words and buffered to mem-

ory on word (16-bit mode) or long word (32-bit mode)

boundaries Data from a packet cannot be buffered on odd

byte boundaries for 16-bit mode and odd word boundaries

for 32-bit mode (see Section 53) For more information on

the receive packet buffering process see Section 54

352 Transmit FIFO

Similar to the Receive FIFO the Transmit FIFO

(Figure 3-9)

serves as a buffer between the 1632-bit system interface

and the network (serializer) interface The Transmit FIFO is

also arranged as a 4 byte by 8 deep memory array (8 long

words or 32 bytes) controlled by three sections of logic

Before transmission can begin the Buffer Management En-

gine fetches a programmed number of 16- or 32-bit words

from memory and transfers them to the FIFO The Buffer

Management Engine writes either the upper or lower half

(16 bits) into the FIFO for 16-bit mode or writes the com-

plete long word (32 bits) during 32-bit mode

The Threshold Logic monitors the number of bytes as they

are written into the FIFO When the threshold has been

reached the Transmit Byte Ordering state machine begins

reading bytes from the FIFO to produce a continuous byte

stream for the serializer The threshold is met when the

number of bytes in the FIFO is greater than the value of the

threshold For example if the transmit threshold is 4 words

(8 bytes) the Transmit Byte Ordering state machine will not

begin reading bytes from the FIFO until there are 9 or more

bytes in the buffer The Buffer Management Engine contin-

ues replenishing the FIFO until the end of the packet It

does this by making multiple DMA requests to the system

interface Whenever the number of bytes in the FIFO is

equal to or less than the threshold value the Buffer Man-

agement Engine will do a DMA request If Block Mode is

set then after each request has been granted by the sys-

tem the Buffer Management Engine will transfer a number

of bytes equal to the threshold value into the FIFO If Emp-

tyFill Mode is set the FIFO will be completely filled in one

DMA request

Since data may be organized in big or little endian byte or-

dering format the Transmit Byte Ordering state machine

uses one of four read pointers to locate the proper byte

within the 4 byte wide FIFO It also determines the valid

number of bytes in the FIFO For packets which begin or

end at odd bytes in the FIFO the Buffer Management En-

gine writes extraneous bytes into the FIFO The Transmit

Byte Ordering state machine detects these bytes and only

transfers the valid bytes to the serializer The Buffer Man-

agement Engine can read data from memory on any byte

boundary (see Section 53) See Section 55 for more infor-

mation on transmit buffering

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