DP83936AVF datasheet(75/104 Pages) NSC

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80 Network Interfacing (Continued)

External ENDEC

When EXTe1 the internal ENDEC is by-

passed and the signals are provided directly to the user

Since SONIC-T’s on-chip ENDEC is the same as National’s

DP83910 Serial Network Interface (SNI) the interface con-

siderations discussed in this section would also apply to

using this device in the external ENDEC mode

81 MANCHESTER ENCODER AND

DIFFERENTIAL DRIVER

The ENDEC unit’s encoder begins operation when the MAC

section begins sending the serial data stream It converts

NRZ data from the MAC section to Manchester data for the

differential drivers (TXg) In Manchester encoding the first

half of the bit cell contains the complementary data and the

second half contains the true data

(Figure 8-3) A transition

always occurs at the middle of the bit cell As long as the

MAC continues sending data the ENDEC section remains

in operation At the end of transmission the last transition is

always positive occurring at the center of the bit cell if the

last bit is a one or at the end of the bit cell if the last bit is a

zero

The differential transmit pair drives up to 50 meters of twist-

ed pair AUI cable These outputs are source followers which

require two 270X pull-down resistors to ground In addition

a pulse transformer is required between the transmit pair

output and the AUI interface

The driver provides full-step mode for compatibility with

Ethernet and IEEE 8023 so that TXa and TXb are equal

in the idle state

TLF12597 – 53

FIGURE 83 Manchester Encoded Data Stream

811 Manchester Decoder

The decoder consists of a differential receiver and a phase

lock loop (PLL) to separate the Manchester encoded data

stream into clock signals and NRZ data The differential in-

put must be externally terminated with two 39X resistors

connected in series In addition a pulse transformer is re-

quired between the receive input pair and the AUI interface

To prevent noise from falsely triggering the decoder a

squelch circuit at the input rejects signals with a magnitude

less than b175 mV Signals more negative than b300 mV

are decoded

Once the input exceeds the squelch requirements the de-

coder begins operation The decoder may tolerate bit jitter

up to 18 ns in the received data The decoder detects the

end of a frame within one and a half bit times after the last

bit of data

812 Collision Translator

When the Ethernet transceiver (DP8392 CTI) detects a colli-

sion it generates a 10 MHz signal to the differential collision

inputs (CDa and CDb) of the SONIC-T When SONIC-T

detects these inputs active its Collision translator converts

the 10 MHz signal to an active collision signal to the MAC

section This signal causes SONIC-T to abort its current

transmission and reschedule another transmission attempt

The collision differential inputs are terminated the same way

as the differential receive inputs and a pulse transformer is

required between the collision input pair and the AUI inter-

face The squelch circuitry is also similar rejecting pulses

with magnitudes less than b175 mV

813 Oscillator Inputs

The oscillator inputs to the SONIC-T (OSCIN and OSCOUT)

can be driven with a parallel resonant crystal or an external

clock In either case the oscillator inputs must be driven with

a 20 MHz signal The signal is divided by 2 to generate the

10 MHz transmit clock (TXC) for the MAC unit The oscilla-

tor also provides internal clock signals for the encoding and

decoding circuits

8131 External Crystal

According to the IEEE 8023 standard the transmit clock

(TXC) must be accurate to 001% This means that the os-

cillator circuit which includes the crystal and other parts

involved must be accurate to 001% after the clock has

been divided in half Hence when using a crystal it is nec-

essary to consider all aspects of the crystal circuit An ex-

ample of a recommended crystal circuit is shown in

Figure

8-4 and suggested oscillator specifications are shown in Ta-

ble 8-1 The load capacitors in

Figure 8-4 C1 and C2

should be no greater than 36 pF each including all stray

capacitance (see note 2) The resistor R1 may be required

in order to minimize frequency drift due to changes in VCC If

R1 is required its value must be carefully selected since R1

decreases the loop gain If R1 is made too large the loop

gain will be greatly reduced and the crystal will not oscillate

If R1 is made too small normal variations in VCC may cause

the oscillation frequency to drift out of specification As a

first rule of thumb the value of R1 should be made equal to

five times the motional resistance of the crystal The mo-

tional resistance of 20 MHz crystals is usually in the range

of 10X to 30X This implies that reasonable values for R1

should be in the range of 50X to 150X The decision of

whether or not to include R1 should be based upon mea-

sured variations of crystal frequency as each of the circuit

parameters are varied

TLF12597 – 54

FIGURE 8-4 Crystal Connection to the SONIC-T

(see text)

Note 1

The OSCOUT pin is not guaranteed to provide a TTL compatible

logic output and should not be used to drive any external logic If

additional logic needs to be driven then an external oscillator

should be used as described in the following section

Note 2

The frequency marked on the crystal is usually measured with a

fixed load capacitance specified in the crystal’s data sheet The

actual load capacitance used should be the specified value minus

the stray capacitance

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