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DP83936AVF Datasheet(PDF) 6 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # DP83936AVF
Description  Full Duplex SONICTM-T Systems-Oriented Network Interface Controller with Twisted Pair Interface
PDF  104 Pages
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

DP83936AVF Datasheet(HTML) 6 Page - National Semiconductor (TI)

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20 Pin Description (Continued)
TABLE 2-1 Pin Description
(Continued)
Symbol
Driver
Direction
Description
Type
NETWORK INTERFACE PINS
(Continued)
CDa
I
AUI COLLISION a
The positive differential collision input from the transceiver This pin should
be unconnected when an external ENDEC is selected (EXT e 1)
CDb
I
AUI COLLISION b
The negative differential collision input from the transceiver This pin should
be unconnected when an external ENDEC is selected (EXT e 1)
RXa
I
AUI RECEIVE a
The positive differential receive data input from the transceiver This pin should
be unconnected when an external ENDEC is selected (EXT e 1)
RXb
I
AUI RECEIVE b
The negative differential receive data input from the transceiver This pin
should be unconnected when an external ENDEC is selected (EXT e 1)
TXa
ECL
O
AUI TRANSMIT a
The positive differential transmit output to the transceiver This pin should be
unconnected when an external ENDEC is selected (EXT e 1)
TXb
ECL
O
AUI TRANSMIT b
The negative differential transmit output to the transceiver This pin should
be unconnected when an external ENDEC is selected (EXT e 1)
CRSo
TP
O
CARRIER SENSE OUTPUT (CRSo)
from the internal ENDEC (EXT e 0) When EXT e 0 the
CRSo signal is internally connected between the ENDEC and MAC units It is asserted on the first
CRSi
I
valid high-to-low transition in the receive data (RXg) This signal remains active 15 bit times
after the last bit of data Although this signal is used internally by the SONIC-T it is also provided
as an output to the user
CARRIER SENSE INPUT (CRSi)
from an external ENDEC (EXT e 1) The CRSi signal is
activated high when the external ENDEC detects valid data at its receive inputs
COLo
TP
O
COLLISION OUTPUT (COLo)
from the internal ENDEC (EXT e 0) When EXT e 0 the COLo
signal is internally connected between the ENDEC and MAC units This signal generates an
COLi
I
active high signal when the 10 MHz collision signal from the transceiver is detected Although this
signal is used internally by the SONIC-T it is also provided as an output to the user
COLLISION DETECT INPUT (COLi)
from an external ENDEC (EXT e 1) The COLi signal is
activated from an external ENDEC when a collision is detected This pin is monitored during
transmissions from the beginning of the Start of Frame Delimiter (SFD) to the end of the packet
At the end of transmission this signal is monitored by the SONIC-T for CD heartbeat
RXDo
TP
O
This pin will be TRI-STATE until the DCR has been written to (See Section 642
RXDi
I
EXBUS for more information)
EXUSR0
TRI
O Z
RECEIVE DATA OUTPUT (RXDo)
from the internal ENDEC (EXT e 0) NRZ data output When
EXT e 0 the RXDo signal is internally connected between the ENDEC and MAC units This
signal must be sampled on the rising edge of the receive clock output (RXCo) Although this
signal is used internally by the SONIC-T it is also provided as an output to the user
RECEIVE DATA INPUT (RXDi)
from an external ENDEC (EXT e 1) The NRZ data decoded
from the external ENDEC This data is clocked in on the rising edge of RXCi
EXTENDED USER OUTPUT (EXUSR0)
When EXBUS has been set (see Section 642) this pin
becomes a programmable output It will remain TRI-STATE until the SONIC-T becomes a bus
master at which time it will be driven according to the value programmed in the DCR2 (see
Section 647)
RXCo
TP
O
This pin will be TRI-STATE until the DCR has been written to (See Section 642
RXCi
I
EXBUS for more information)
EXUSR1
TRI
O Z
RECEIVE CLOCK OUTPUT (RXCo)
from the internal ENDEC (EXT e 0) When EXT e 0 the
RXCo signal is internally connected between the ENDEC and MAC units This signal is the
receive clock that is derived from the Manchester data stream It remains active 5-bit times after
the deassertion of CRSo Although this signal is used internally by the SONIC-T it is also provided
as an output to the user
RECEIVE CLOCK INPUT (RXCi)
from an external ENDEC (EXT e 1) The receive clock that is
derived from the Manchester data stream This signal is generated from an external ENDEC
EXTENDED USER OUTPUT (EXUSR1)
When EXBUS has been set (see Section 642) this pin
becomes a programmable output It will remain TRI-STATE until the SONIC-T becomes a bus
master at which time it will be driven according to the value programmed in the DCR2 (see
Section 647)
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