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DP83936AVF Datasheet(PDF) 38 Page - National Semiconductor (TI) |
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DP83936AVF Datasheet(HTML) 38 Page - National Semiconductor (TI) |
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38 / 104 page  60 SONIC-T Registers (Continued) TABLE 6-1 User Registers (Continued) RA5 – RA0 Access Register Symbol Description (section) WATCHDOG COUNTERS 29 RW Watchdog Timer WT0 6412 2A RW Watchdog Timer 1 WT1 6412 SILICON REVISION 28 R Silicon Revision SR 6413 Note 1 These registers can only be read when the SONIC-T is in reset mode (RST bit in the CR is set) The SONIC-T gives invalid data when these registers are read in non-reset mode Note 2 This register can only be written to when the SONIC-T is in reset mode This register is normally only loaded by the Load CAM command Note 3 The Data Configuration registers DCR and DCR2 can only be written to when the SONIC-T is in reset mode (RST bit in CR is set) Writing to these registers while not in reset mode does not alter the registers Note 4 The data written to these registers is inverted before being latched That is if a value of FFFFh is written these registers will contain and read back the value of 0000h Data is not inverted during a read operation TABLE 6-2 Internal Use Registers (Users should not write to these registers) (RA5 – RA0) Access Register Symbol Description (section) TRANSMIT REGISTERS 08 (Note 1) RW Transmit Packet Size TPS 55 09 RW Transmit Fragment Count TFC 55 0A RW Transmit Start Address 0 TSA0 55 0B RW Transmit Start Address 1 TSA1 55 0C (Note 2) RW Transmit Fragment Size TFS 55 20 RW Temporary Transmit Descriptor Address TTDA 554 2F R Maximum Deferral Timer MDT 644 RECEIVE REGISTERS 0F RW Current Receive Buffer Address 0 CRBA0 542 5442 10 RW Current Receive Buffer Address 1 CRBA1 542 5442 11 RW Remaining Buffer Word Count 0 RBWC0 542 5442 12 RW Remaining Buffer Word Count 1 RBWC1 542 5442 19 RW Temporary Receive Buffer Address 0 TRBA0 5462 1A RW Temporary Receive Buffer Address 1 TRBA1 5462 1B RW Temporary Buffer Word Count 0 TBWC0 5462 1C RW Temporary Buffer Word Count 1 TBWC1 5462 1F RW Last Link Field Address LLFA none ADDRESS GENERATORS 1D RW Address Generator 0 ADDR0 none 1E RW Address Generator 1 ADDR1 none Note 1 The data that is read from these registers is the inversion of what has been written to them Note 2 The value that is written to this register is shifted once in 16-bit mode and shifted twice in 32-bit mode TABLE 6-3 National Factory Test Registers (Users should not access these registers) (RA5 – RA0) Access Register Symbol Description (section) 30 These registers are for factory use only Users must not RW address these registers or improper SONIC-T operation none none 3E can occur http www nationalcom 38 |
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