| Electronic Components Datasheet Search |
|
DP83936AVF Datasheet(PDF) 89 Page - National Semiconductor (TI) |
|
|
|
|||||||||||||||||||||||||||||
DP83936AVF Datasheet(HTML) 89 Page - National Semiconductor (TI) |
|
89 / 104 page ![]() 90 AC and DC Specifications (Continued) BUS REQUEST TIMING BMODE e 1 TLF12597 – 69 Number Parameter 20 MHz 25 MHz 33 MHz Units Min Max Min Max Min Max T45a BG AS BGACK DSACK01 and STERM Asynchronous 765 ns Setup Time to BSCK (Note 1) T51a BSCK to Address AS MRW DS ECS 37 35 33 ns USRk10l and EXUSRk30l TRI-STATE T52 BSCK to Data TRI-STATE 34 32 30 ns T53 BSCK to Address AS MRW DS ECS 34 32 30 ns USRk10l and EXUSRk30l Active (Note 1) T54 BSCK Low to BR LowTRI-STATE 26 24 22 ns T54a BSCK High to BGACK LowHigh 24 22 20 ns T54b High to BGACK TRI-STATE 19 17 15 ns T55 BSCK to Bus Status Valid 29 27 25 ns T55b Sk20l Hold from BSCK 3 3 3 ns Note 1 BGACK is asserted one bus clock after all the signals (AS DSACK01 BGACK STERM (Extended bus mode) and BG) meet the T45a setup time (see Section 541 for more information) The address bus AS DS ECS MRW USRk10l and EXUSRk30l will also be driven active on the same clock Note 2 Sk20l will indicate IDLE at the end of T2 if the last operation is a read operation or at the end of Th if the last operation is a write operation http www nationalcom 89 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |