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26HS01GTAM03 Datasheet(PDF) 120 Page - Infineon Technologies AG

Part # 26HS01GTAM03
Description  256Mb/512Mb/1Gb SEMPER??Flash HYPERBUS??interface, 1.8V/3.0V
PDF  166 Pages
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Manufacturer  INFINEON [Infineon Technologies AG]
Direct Link  http://www.infineon.com
Logo INFINEON - Infineon Technologies AG

26HS01GTAM03 Datasheet(HTML) 120 Page - Infineon Technologies AG

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002-12337 Rev. *Y
2022-01-18
256Mb/512Mb/1Gb SEMPER™ Flash
HYPERBUS™ interface, 1.8V/3.0V
Registers
5.3.17
ASP dynamic block access register (DYAV) (x1)
The ASP DYB Access Register (DYAV) is used to provide the state of each sector’s DYB protection bit.
5.3.18
AutoBoot register (ATBN) (x1)
The AutoBoot Register (ATBN) provides a means to automatically read boot code as part of the power-on reset,
or hardware reset process.
Table 112
ASP DYB access register (x1)
Bit number
Name
Function
Read/write
N = Nonvolatile
V = Volatile
Factory
default
(binary)
Description
DYAV[7:0]
DYBACS[7:0]
Sector Based DYB
Protection Status
V -> R/W
11111111
Description: The DYBACS[7:0] bits are used to provide the state
of the individual sector’s DYB bit.
Selection Options:
FF = DYB for the sector addressed by the Read DYB transaction
(RDDYB_4_0) is 1, not protecting that sector from program or
erase operations
00 = DYB for the sector addressed by the Read DYB transaction
(RDDYB_4_0) is 0, protecting that sector from program or erase
operations
Dependency: N/A
Table 113
AutoBoot register (x1)
Bit number
Name
Function
Read/write
N = Nonvolatile
V = Volatile
Factory
default
(binary)
Description
ATBN[31:9]
STADR[22:0]
Starting Address
Selection where AutoBoot
will start reading data
from
N -> R/W
0000000000
0000000000
000
Description: The STADR[22:0] bits set the starting
address from which the device will output the read data.
Selection Options: Address Bits
Dependency: N/A
ATBN[8:1]
STDLY[7:0]
AutoBoot Read Starting
Delay Selection
N -> R/W
00000000
Description: The STDLY[7:0] bits specify the initial delay
(clock cycles) needed by the host before it can accept
data.
Note STDLY[7:0]=0x00 is valid for SPI up to 50MHz.
STDLY[7:0] = 0x01 or higher is valid for SPI/DPI/QPI up to
166MHz. STDLY[7:0] = 0x05 or higher is valid for HL-T
Octal up to
166MHz and HS-T Octal up to
200MHz.
Selection Options: Address Bits
Dependency: N/A
ATBN[0]
ATBTEN
AutoBoot Feature
Selection
N -> R/W
0
Description: The ATBTEN bit enables or disables the
AutoBoot feature.
Selection Options:
0 = AutoBoot feature disabled
1 = AutoBoot feature enabled
Dependency: N/A



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