MC9S08DN60F1CLF datasheet(21/356 Pages) FREESCALE

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Chapter 1 Device Overview

MC9S08DN60 Series Data Sheet, Rev 3

Freescale Semiconductor

Table 1-2 provides the functional version of the on-chip modules.

1.3

System Clock Distribution

Figure 1-2 shows a simpliﬁed clock connection diagram. Some modules in the MCU have selectable clock

inputs as shown. The clock inputs to the modules indicate the clock(s) that are used to drive the module

function.

The following are the clocks used in this MCU:

•

BUSCLK — The frequency of the bus is always half of MCGOUT.

•

LPO — Independent 1-kHz clock that can be selected as the source for the COP and RTC modules.

•

MCGOUT — Primary output of the MCG and is twice the bus frequency.

•

MCGLCLK — Development tools can select this clock source to speed up BDC communications

in systems where BUSCLK is conﬁgured to run at a very slow frequency.

•

MCGERCLK — External reference clock can be selected as the RTC clock source. It can also be

used as the alternate clock for the ADC.

•

MCGIRCLK — Internal reference clock can be selected as the RTC clock source.

•

MCGFFCLK — Fixed frequency clock can be selected as clock source for the TPM1 and TPM2.

•

TPM1CLK — External input clock source for TPM1.

•

TPM2CLK — External input clock source for TPM2.

Table 1-2. Module Versions

Module

Version

Central Processor Unit

(CPU)

Multi-Purpose Clock Generator

(MCG)

Analog Comparator

(ACMP)

Analog-to-Digital Converter

(ADC)

Inter-Integrated Circuit

(IIC)

Serial Peripheral Interface

(SPI)

Serial Communications Interface

(SCI)

Real-Time Counter

(RTC)

Timer Pulse Width Modulator

(TPM)

1 3M05C and older masks have TPM version 2.

Debug Module

(DBG)

MC9S08DN60F1CLF Datasheet(PDF) 21 Page - Freescale Semiconductor, Inc

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