MC9S08DN60F1CLF datasheet(11/356 Pages) FREESCALE

11 / 356 page

MC9S08DN60 Series Data Sheet, Rev 3

Freescale Semiconductor

Section Number

Title

Page

6.3.2

Edge and Level Sensitivity ................................................................................................82

6.3.3

Pull-up/Pull-down Resistors .............................................................................................82

6.3.4

Pin Interrupt Initialization .................................................................................................82

6.4

Pin Behavior in Stop Modes.............................................................................................................82

6.5

Parallel I/O and Pin Control Registers .............................................................................................83

6.5.1

Port A Registers ................................................................................................................84

6.5.2

Port B Registers ................................................................................................................88

6.5.3

Port C Registers ................................................................................................................92

6.5.4

Port D Registers ................................................................................................................95

6.5.5

Port E Registers .................................................................................................................99

6.5.6

Port F Registers ...............................................................................................................102

6.5.7

Port G Registers ..............................................................................................................105

Chapter 7

Central Processor Unit (S08CPUV3)

7.1

Introduction ....................................................................................................................................109

7.1.1

Features ...........................................................................................................................109

7.2

Programmer’s Model and CPU Registers ......................................................................................110

7.2.1

Accumulator (A) .............................................................................................................110

7.2.2

Index Register (H:X) .......................................................................................................110

7.2.3

Stack Pointer (SP) ...........................................................................................................111

7.2.4

Program Counter (PC) ....................................................................................................111

7.2.5

Condition Code Register (CCR) .....................................................................................111

7.3

Addressing Modes..........................................................................................................................113

7.3.1

Inherent Addressing Mode (INH) ...................................................................................113

7.3.2

Relative Addressing Mode (REL) ...................................................................................113

7.3.3

Immediate Addressing Mode (IMM) ..............................................................................113

7.3.4

Direct Addressing Mode (DIR) ......................................................................................113

7.3.5

Extended Addressing Mode (EXT) ................................................................................114

7.3.6

Indexed Addressing Mode ..............................................................................................114

7.4

Special Operations..........................................................................................................................115

7.4.1

Reset Sequence ...............................................................................................................115

7.4.2

Interrupt Sequence ..........................................................................................................115

7.4.3

Wait Mode Operation ......................................................................................................116

7.4.4

Stop Mode Operation ......................................................................................................116

7.4.5

BGND Instruction ...........................................................................................................117

7.5

HCS08 Instruction Set Summary ...................................................................................................118

Chapter 8

Multi-Purpose Clock Generator (S08MCGV1)

8.1

Introduction ....................................................................................................................................129

8.1.1

Features ...........................................................................................................................131

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