MC9S08DN60F1CLF datasheet(10/356 Pages) FREESCALE

10 / 356 page

MC9S08DN60 Series Data Sheet, Rev 3

Freescale Semiconductor

Section Number

Title

Page

4.5.2

Program and Erase Times .................................................................................................48

4.5.3

Program and Erase Command Execution .........................................................................48

4.5.4

Burst Program Execution ..................................................................................................50

4.5.5

Sector Erase Abort ............................................................................................................52

4.5.6

Access Errors ....................................................................................................................53

4.5.7

Block Protection ................................................................................................................54

4.5.8

Vector Redirection ............................................................................................................54

4.5.9

Security .............................................................................................................................54

4.5.10 EEPROM Mapping ...........................................................................................................56

4.5.11 Flash and EEPROM Registers and Control Bits ...............................................................56

Chapter 5

Resets, Interrupts, and General System Control

5.1

Introduction ......................................................................................................................................63

5.2

Features ............................................................................................................................................63

5.3

MCU Reset .......................................................................................................................................63

5.4

Computer Operating Properly (COP) Watchdog..............................................................................64

5.5

Interrupts ..........................................................................................................................................65

5.5.1

Interrupt Stack Frame .......................................................................................................66

5.5.2

External Interrupt Request (IRQ) Pin ...............................................................................66

5.5.3

Interrupt Vectors, Sources, and Local Masks ....................................................................67

5.6

Low-Voltage Detect (LVD) System .................................................................................................68

5.6.1

Power-On Reset Operation ...............................................................................................69

5.6.2

Low-Voltage Detection (LVD) Reset Operation ...............................................................69

5.6.3

Low-Voltage Warning (LVW) Interrupt Operation ...........................................................69

5.7

MCLK Output ..................................................................................................................................69

5.8

Reset, Interrupt, and System Control Registers and Control Bits ....................................................70

5.8.1

Interrupt Pin Request Status and Control Register (IRQSC) ............................................71

5.8.2

System Reset Status Register (SRS) .................................................................................72

5.8.3

System Background Debug Force Reset Register (SBDFR) ............................................73

5.8.4

System Options Register 1 (SOPT1) ................................................................................74

5.8.5

System Options Register 2 (SOPT2) ................................................................................75

5.8.6

System Device Identiﬁcation Register (SDIDH, SDIDL) ................................................76

5.8.7

System Power Management Status and Control 1 Register (SPMSC1) ...........................77

5.8.8

System Power Management Status and Control 2 Register (SPMSC2) ...........................78

Chapter 6

Parallel Input/Output Control

6.1

Port Data and Data Direction ...........................................................................................................79

6.2

Pull-up, Slew Rate, and Drive Strength............................................................................................80

6.3

Pin Interrupts ....................................................................................................................................81

6.3.1

Edge Only Sensitivity .......................................................................................................81

MC9S08DN60F1CLF Datasheet(PDF) 10 Page - Freescale Semiconductor, Inc

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