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MC9S08DN60F1CLF Datasheet(PDF) 98 Page - Freescale Semiconductor, Inc |
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MC9S08DN60F1CLF Datasheet(HTML) 98 Page - Freescale Semiconductor, Inc |
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98 / 356 page ![]() Chapter 6 Parallel Input/Output Control MC9S08DN60 Series Data Sheet, Rev 3 98 Freescale Semiconductor 6.5.4.7 Port D Interrupt Pin Select Register (PTDPS) 6.5.4.8 Port D Interrupt Edge Select Register (PTDES) 76543210 R PTDPS7 PTDPS6 PTDPS5 PTDPS4 PTDPS3 PTDPS2 PTDPS1 PTDPS0 W Reset: 00000000 Figure 6-30. Port D Interrupt Pin Select Register (PTDPS) Table 6-28. PTDPS Register Field Descriptions Field Description 7:0 PTDPS[7:0] Port D Interrupt Pin Selects — Each of the PTDPSn bits enable the corresponding port D interrupt pin. 0 Pin not enabled as interrupt. 1 Pin enabled as interrupt. 76543210 R PTDES7 PTDES6 PTDES5 PTDES4 PTDES3 PTDES2 PTDES1 PTDES0 W Reset: 00000000 Figure 6-31. Port D Edge Select Register (PTDES) Table 6-29. PTDES Register Field Descriptions Field Description 7:0 PTDES[7:0] Port D Edge Selects — Each of the PTDESn bits serves a dual purpose by selecting the polarity of the active interrupt edge as well as selecting a pull-up or pull-down device if enabled. 0 A pull-up device is connected to the associated pin and detects falling edge/low level for interrupt generation. 1 A pull-down device is connected to the associated pin and detects rising edge/high level for interrupt generation. |
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