MC9S08DN60F1CLF datasheet(13/356 Pages) FREESCALE

13 / 356 page

MC9S08DN60 Series Data Sheet, Rev 3

Freescale Semiconductor

Section Number

Title

Page

10.1.7 ADC Module Block Diagram .........................................................................................171

10.2 External Signal Description ...........................................................................................................172

10.2.1 Analog Power (VDDAD) ..................................................................................................173

10.2.2 Analog Ground (VSSAD) .................................................................................................173

10.2.3 Voltage Reference High (VREFH) ...................................................................................173

10.2.4 Voltage Reference Low (VREFL) .....................................................................................173

10.2.5 Analog Channel Inputs (ADx) ........................................................................................173

10.3 Register Deﬁnition .........................................................................................................................173

10.3.1 Status and Control Register 1 (ADCSC1) ......................................................................173

10.3.2 Status and Control Register 2 (ADCSC2) ......................................................................175

10.3.3 Data Result High Register (ADCRH) .............................................................................175

10.3.4 Data Result Low Register (ADCRL) ..............................................................................176

10.3.5 Compare Value High Register (ADCCVH) ....................................................................176

10.3.6 Compare Value Low Register (ADCCVL) .....................................................................177

10.3.7 Conﬁguration Register (ADCCFG) ................................................................................177

10.3.8 Pin Control 1 Register (APCTL1) ..................................................................................178

10.3.9 Pin Control 2 Register (APCTL2) ..................................................................................179

10.3.10Pin Control 3 Register (APCTL3) ..................................................................................180

10.4 Functional Description ...................................................................................................................181

10.4.1 Clock Select and Divide Control ....................................................................................182

10.4.2 Input Select and Pin Control ...........................................................................................182

10.4.3 Hardware Trigger ............................................................................................................182

10.4.4 Conversion Control .........................................................................................................182

10.4.5 Automatic Compare Function .........................................................................................185

10.4.6 MCU Wait Mode Operation ............................................................................................185

10.4.7 MCU Stop3 Mode Operation ..........................................................................................186

10.4.8 MCU Stop2 Mode Operation ..........................................................................................186

10.5 Initialization Information ...............................................................................................................187

10.5.1 ADC Module Initialization Example .............................................................................187

10.6 Application Information .................................................................................................................189

10.6.1 External Pins and Routing ..............................................................................................189

10.6.2 Sources of Error ..............................................................................................................190

Chapter 11

Inter-Integrated Circuit (S08IICV2)

11.1 Introduction ....................................................................................................................................193

11.1.1 Features ...........................................................................................................................195

11.1.2 Modes of Operation ........................................................................................................195

11.1.3 Block Diagram ................................................................................................................196

11.2 External Signal Description ...........................................................................................................196

11.2.1 SCL — Serial Clock Line ...............................................................................................196

11.2.2 SDA — Serial Data Line ................................................................................................196

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