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26HS01GTAM03 Datasheet(PDF) 138 Page - Infineon Technologies AG |
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26HS01GTAM03 Datasheet(HTML) 138 Page - Infineon Technologies AG |
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138 / 166 page  Read Flash Array RDAY1_C_0 Read transaction reads out the memory contents at the given address. The maximum CK frequency for this transaction is 50MHz frequency. - 03 (CMD) ADDR [23:16] ADDR [15:8] ADDR [7:0] - --- - Figure 12 50 3 - ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - 4 RDAY1_4_0 - 13 (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - RDAY2_C_0 Read Fast transaction reads out the memory contents starting at the given address. - 0B (CMD) ADDR [23:16] ADDR [15:8] ADDR [7:0] - --- - Figure 11 166 3 - ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - 4 Program Flash Array PRPGE_4_1 Program Page programs 256B or 512B data to the memory array in one transaction. WRENB_0_0 12 (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data1 [7:0] Input Data2 [7:0] (Conti nue) - Figure 8 4 Erase Flash Array ER004_4_0 Erase 4-KB Sector transaction sets all the bits of a 4KB sector to 1 (all bytes are FFh). WRENB_0_0 21 (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - Figure 6 ER256_4_0 Erase 256-KB Sector transaction sets all the bits of a 256KB sector to 1 (all bytes are FFh). WRENB_0_0 DC (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - ERCHP_0_0 Erase Chip transaction sets all bits to 1 (all bytes are FFh) inside the entire flash memory array. WRENB_0_0 60 or C7 (CMD) - --- - - - - Figure 5 N/A EVERS_4_0 Evaluate Erase Status transaction verifies that the last erase operation on the addressed sector was completed success- fully. - D0 (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - Figure 6 4 SEERC_4_0 Sector Erase Count transaction outputs the number of erase cycles for the sector of the inputed address from the Sector Erase Count Register. - 5D (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - Suspend / Resume SPEPD_0_0 Suspend Erase / Program / Data Integrity Check transaction allows the system to interrupt a programming, erase or data integrity check operation. - B0 (CMD) - --- - - - - Figure 5 N/A RSEPD_0_0 Resume Erase / Program / Data Integrity Check transaction allows the system to resume a programming, erase or data integrity check operation. - 7A (CMD) - --- - - - - Secure Silicon Region PRSSR_4_1 Program SSR transaction programs data in 1024 bytes of SSR. WRENB_0_0 42 (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] Input Data1 [7:0] Input Data2 [7:0] (Conti nue) - Figure 8 4 RDSSR_4_0 Read SSR transaction reads data from the SSR. - 4B (CMD) ADDR [31:24] ADDR [23:16] ADDR [15:8] ADDR [7:0] --- - Figure 11 Table 122 SPI (1S-1S-1S) transaction table (Continued) Function Transaction name Description Prerequisite transaction Byte1 (Hex) Byte 2 (Hex) Byte 3 (Hex) Byte 4 (Hex) Byte 5 (Hex) Byte6 (Hex) Byte7 (Hex) Byte8 (Hex) Byte 9 (Hex) Transaction format Max frequency (MHz) Address length |
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