26HS01GTAM03 datasheet(155/166 Pages) INFINEON

155 / 166 page

Datasheet

155 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Device identification

9.3

xSPI profile 2

14Ch

(SA) + A6h

JEDEC basic flash

parameter

DWORD-20

FFh

Bits 31:28 = Maximum operation speed of device in 8D-8D-8D mode when utilizing

Data Strobe = 1000b (200MHz) / 0111b (166MHz)

Bits 27:24 = 8D-8D-8D mode without using Data Strobe is not characterized = 1110b

Bits 23:20 = 1111b

Bits 19:16 = 1111b

Bit 15:0 = Not Supported = FFFFh

14Dh

FFh

14Eh

(SA) + A7h

FFh

14Fh

8Eh HS-T

7Eh HL-T

Table 132

xSPI profile 2 parameters

Byte

address

(x1 SPI)

Word address

(x8 HB)

SFDP DWORD

name

Data

Description

150h

(SA) + A8h

JEDEC xSPI

(Profile 2.0)

DWORD 1

E0h

Bit 7 = Program Suspend Supported = 1b

Bit 6 = Program Resume Supported = 1b

Bit 5 = Enter SPI (1S-1S-1S) Supported = 1b

Bit 4:0 = Reserved (00000b)

151h

FFh

Bit 15 = Deep Power Down Supported = 1b

Bit 14 = Word Program Supported = 1b

Bit 13 = Sector Erase Supported = 1b

Bit 12 = Chip Erase Supported = 1b

Bit 11 = Erase Suspend Supported = 1b

Bit 10 = Erase Resume Supported = 1b

Bit 9 = Write to Buffer Supported = 1b

Bit 8 = Program Write to Buffer Supported = 1b

152h

(SA) + A9h

FFh

Bit 23 = Memory Write Linear Supported = 1b

Bit 22 = WREN1 Supported = 1b

Bit 21 = WREN2 Supported = 1b

Bit 20 = SREN Supported = 1b

Bit 19 = Status Register Read Supported = 1b

Bit 18 = Status Register Clear Supported = 1b

Bit 17 = Configuration Register Read Supported = 1b

Bit 16 = Configuration Register Load Supported = 1b

153h

FFh

Bit 31 = xSPI Profile 2 Supported = 1b

Bit 30 = Register Read Wrap Supported = 1b

Bit 29 = Register Read Linear Supported = 1b

Bit 28 = Memory Read Wrap Supported = 1b

Bit 27 = Memory Read Linear Supported = 1b

Bit 26 = Register Write Wrap Supported = 1b

Bit 25 = Register Write Linear Supported = 1b

Bit 24 = Memory Write Wrap Supported = 1b

154h

(SA) + AAh

JEDEC xSPI

(Profile 2.0)

DWORD 2

2Ch

Bits 15:12 = Reserved = 0000b

Bits 11:7 = 200MHz 16 Dummy Cycles = 10000b

Bits 6:2 = 200MHz Configuration Bit Pattern = 01011b

Bits 1:0 = Reserved = 00b

155h

08h

156h

(SA) + ABh

00h

Bits 31:16 = Reserved = 00000000000000000b

157h

00h

158h

(SA) + ACh

JEDEC xSPI

(Profile 2.0)

DWORD 3

0Ch

Bits 31:27 = 166MHz 14 Dummy Cycles = 01110b

Bits 26:22 = 166MHz Configuration Bit Pattern = 01001b

Bits 21:17 = 133MHz 12 Dummy Cycles = 01100b

Bits 16:12 = 133MHz Configuration Bit Pattern = 00111b

Bits 11:7 = 100MHz 8 Dummy Cycles = 01000b

Bits 6:2 = 100MHz Configuration Bit Pattern = 00011b

Bits 1:0 = Reserved = 00b

159h

74h

15Ah

(SA) + ADh

58h

15Bh

72h

Table 131

JEDEC SFDP Rev D parameter table (Continued)

Byte

address

(x1 SPI)

Word address

(x8 HB)

SFDP DWORD

name

Data

Description

26HS01GTAM03 Datasheet(PDF) 155 Page - Infineon Technologies AG

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