ST10F280_12 datasheet(81/239 Pages) STMICROELECTRONICS

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ST10F280

PWM module

Doc ID 8673 Rev. 3

81/239

PWM module

11.1

Standard PWM module

The pulse width modulation module can generate up to four PWM output signals using

edge-aligned or centre-aligned PWM. In addition, the PWM module can generate PWM

burst signals and single shot outputs. The Table 14 shows the PWM frequencies for different

resolutions.

The level of the output signals is selectable and the PWM module can generate interrupt

requests.

Figure 17.

Block diagram of PWM module

11.2

New PWM module: XPWM

The new Pulse Width Modulation (XPWM) Module of the ST10F280 is mapped on the

XBUS interface (Address range 00’EC00h-00’ECFFh) and allows the generation of up to 4

independent PWM signals.The XPWM is enabled by setting XPEN bit 2 of the SYSCON

signals for a 40MHz CPU clock is from 9.6Hz up to 20MHz for edge aligned signals. For

center aligned signals the frequency range is 4.8Hz up to 10MHz (see detailed description).

The minimum values depend on the width (16 bit) and the resolution (CLK/1 or CLK/64) of

Table 14.

PWM unit frequencies and resolution at 40MHz CPU clock

Mode 0

Resolution

8-bit

10-bit

12-bit

14-bit

16-bit

CPU Clock/1

25ns

156.25kHz

39.06kHz

9.77kHz

2.44Hz

610.35Hz

CPU Clock/64

1.6

μs

2.44Hz

610.35Hz

152.58Hz

38.15Hz

9.54Hz

Mode 1

Resolution

8-bit

10-bit

12-bit

14-bit

16-bit

CPU Clock/1

25ns

78.12kHz

19.53kHz

4.88kHz

1.22kHz

305.17Hz

CPU Clock/64

1.6

μs

1.22kHz

305.17Hz

76.29Hz

19.07Hz

4.77Hz

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