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ST10F280 Datasheet(PDF) 1 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 1 Page - STMicroelectronics |
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1 / 239 page  This is information on a product in full production. August 2012 Doc ID 8673 Rev. 3 1/239 1 ST10F280 16-bit MCU with MAC unit, 512 Kbyte Flash memory and 18 Kbyte RAM Datasheet − production data Features ■ High performance cpu with dsp functions – 16-bit CPU with 4-stage pipeline. – 50ns Instruction cycle time at 40MHz CPU clock – Multiply/accumulate unit (MAC) 16 x 16-bit multiplication, 40-bit accumulator – Repeat unit – Enhanced boolean bit manipulation facilities – Additional instructions to support hll and operating systems – Single-cycle context switching support ■ Memory organization – 512KB on-chip Flash memory single voltage with erase/program controller – 100K erasing/programming cycles – 20 year data retention time – Up to 16MB linear address space for code and data (5MB with CAN) – 2KB on-chip internal ram (IRAM) – 16KB extension RAM (XRAM) ■ Fast and flexible bus – Programmable external bus characteristics for different address ranges – 8-bit or 16-bit external data bus – Multiplexed or demultiplexed external address/data buses – Five programmable chip-select signals – Hold-acknowledge bus arbitration support ■ Interrupt – 8-channel peripheral event controller for single cycle, interrupt driven data transfer – 16-priority-level interrupt system with 56 sources, sample-rate down to 25ns ■ Two multi-functional general purpose timer units with 5 timers ■ Two 16-channel capture/compare units ■ A/D converter – 2X16-channel 10-bit –4.85 μs conversion time – One timer for adc channel injection ■ 8-channel PWM unit ■ Serial channels – Synchronous/async serial channel – High-speed synchronous channel ■ Fail-safe protection – Programmable watchdog timer – Oscillator watchdog ■ Two CAN 2.0b interfaces operating on one or two can busses (30 or 2x15 message objects) ■ On-chip bootstrap loader ■ Clock generation –On-chip PLL – Direct or prescaled clock input ■ Up to 143 general purpose i/o lines – Individually programmable as input, output or special function – Programmable threshold (hysteresis) ■ Idle and power down modes ■ Maximum cpu frequency 40MHz ■ Package PBGA 208 balls (23 x 23 x 1.96 mm - pitch 1.27 mm) ■ Single voltage supply: 5 V ±10% (embedded regulator for 3.3 V core supply) ■ Temperature range: -40°C to 125°C PBGA208 (23 x 23 x 1.96 - Pitch 1.27 mm) (Plastic Bold Grid Array) ORDER CODE: ST10F280-JT3 www.st.com |
Similar Part No. - ST10F280_12 |
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Similar Description - ST10F280_12 |
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