26HS01GTAM03 datasheet(109/166 Pages) INFINEON

109 / 166 page

Datasheet

109 of 166

002-12337 Rev. *Y

2022-01-18

256Mb/512Mb/1Gb SEMPER™ Flash

HYPERBUS™ interface, 1.8V/3.0V

Registers

5.3.3

Configuration register 1 (CFR1x) (x1)

Configuration Register 1 controls interface and data protection functions.

Table 93

Configuration register 1 (x1)

Bit number

Name

Function

Read/write

N = Nonvolatile

V = Volatile

Factory

default

(binary)

Description

CFR1N[7]

CFR1V[7]

RESRVD

Reserved for Future Use

N -> R/W

V -> R/W

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

CFR1N[6]

CFR1V[6]

SP4KBS

Split 4KB Sectors

selection between top

and bottom address

space

If PLPROT = 0

N -> R/W

V -> R

If PLPROT = 1

N -> R

V -> R

Description: The SP4KBS bit selects whether the 4KB

sectorsare grouped together or evenly split between High

and Low address ranges.

Selection Options:

0 = 4KB Sectors are grouped together

1 = 4KB Sectors are split between High and Low Addresses

Dependency: TB4KBS(CFR1N[2])

CFR1N[5]

CFR1V[5]

TBPROT

Top or Bottom Address

Selection for Read

Password

If PLPROT = 0

N -> R/W

V -> R

If PLPROT = 1

N -> R

V -> R

Description: TBPROT selects a memory address range

(lowest or highest) to remain readable during Read

Password Protection mode even before a successful

Password entry is completed.

Selection Options:

0 = Top half of the address range

1 = Bottom half of the address range

Dependency: N/A

CFR1N[4]

CFR1V[4]

PLPROT

Permanent Locking

selection of 4KB Sector

Architecture

N -> R/1

V -> R

Description: The PLPROT bit permanently protects 4KB

Sector location.

Note PLPROT protects SP4KBS, TBPROT, and TB4KBS

bits from program and erase and it is recommended to

configure these bits before configuring the PLPROT bit.

Selection Options:

0 = 4KB Sector Location is not protected

1 = 4KB Sector Location is protected

Dependency: N/A

CFR1N[3]

CFR1V[3]

RESRVD

Reserved for Future Use

N -> R/W

V -> R/W

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

CFR1N[2]

CFR1V[2]

TB4KBS

Top or Bottom Address

Range selection for 4KB

Sector Block

If PLPROT = 0

N -> R/W

V -> R

If PLPROT = 1

N -> R

V -> R

Description:

The TB4KBS bit defines the logical address location of the

4KBsector block. The 4KB sector block replaces the fitting

portion of the highest or lowest address sector.

Selection Options:

0 = 4KB Sector Block is in the bottom of the memory

address space

1 = 4KB Sector Block is in the top of the memory address

space

Dependency: SP4KBS (CFR1x[6])

CFR1N[1]

CFR1V[1]

RESRVD

Reserved for Future Use

N -> R/W

V -> R/W

This bit is Reserved for future use. This bit must always be

written/loaded to its default state.

CFR1N[0]

CFR1V[0]

TLPROT

Temporary Locking

selection of Legacy

Block Protection and

Sector Architecture

N -> R

V -> R/W

Description:

The TLPROT bit temporarily protects sector architecture

from any changes.

Note TLPROT protects SP4KBS, TBPROT, and TB4KBS

bits from program and erase.

Selection Options:

0 = 4KB Sector Location are not protected

1 = 4KB Sector Location are temporarily protected

Dependency: N/A

26HS01GTAM03 Datasheet(PDF) 109 Page - Infineon Technologies AG

26HS01GTAM03 Datasheet(HTML) 109 Page - Infineon Technologies AG

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL