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ST10F280 Datasheet(PDF) 105 Page - STMicroelectronics |
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ST10F280 Datasheet(HTML) 105 Page - STMicroelectronics |
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105 / 239 page ![]() ST10F280 Parallel ports Doc ID 8673 Rev. 3 105/239 As all other capture inputs, the capture input function of pins P1H.7...P1H.4 can also be used as external interrupt inputs (200 ns sample rate at 40MHz CPU clock). During external accesses in de-multiplexed bus modes PORT1 outputs the 16-bit intra- segment address as an alternate output function. During external accesses in multiplexed bus modes, when no BUSCON register selects a de-multiplexed bus mode, PORT1 is not used and is available for general purpose I/O (see Figure 31). When an external bus mode is enabled, the direction of the port pin and the loading of data into the port output latch are controlled by the bus controller hardware. The input of the port output latch is disconnected from the internal bus and is switched to the line labeled “Alternate Data Output” via a multiplexer. The alternate data is the 16-bit intra-segment address. While an external bus mode is enabled, the user software should not write to the port output latch, otherwise unpredictable results may occur. When the external bus modes are disabled, the contents of the direction register last written by the user becomes active. Figure 31. Port 1 I/O and alternate functions The figure below shows the structure of a PORT1 pin. |
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