MM32F103CET datasheet(20/89 Pages) MINDMOTION

20 / 89 page

DS_MM32F103xx_o_Ver1.13

Specification

292534

HSI

48 MHz

PLL

Prescaler

/1,2,3...

HSI/6

PLLCLK

AHB

Prescaler/

1,2..512

HSE OSC

2-24 MHz

LSE OSC

32.768 kHz

LSI

40kHz

CSS

/128

HSE

SYSCLK

PLLSRC

PLLXTPRE

LSE

RTCSEL [1:0]

LSI

RTC Clock

IWDG Clock

OSC32_OUT

OSC32_IN

OSC_IN

OSC_OUT

48MHz

APB1

Prescaler

/1,2,4,8,16

If (APB1 Prescaler=1) x 1

else

x 2

ADC

Prescaler

/2,4,6,8

48MHz USB/RNG

SysTick

Clock

FCLK Cortex

Free-running clock

Legend:

HSE = high-speed external clock signal

HSI = high-speed internal clock signal

LSI = low-speed internal clock signal

LSE = low-speed external clock signal

HSI

CRS

AHB

Peripheral

Clocks

Peripheral Clock Enable

TRNG Seed

APB1

Peripherals

Clock

Peripheral Clock Enable

APB1 Timer

Clock

Peripheral

Clock Enable

APB2

Prescaler

/1,2,4,8,16

APB2

Peripherals

Clock

Max-Freq = 15 MHz

If (APB2 Prescaler=1) x 1

else

x 2

Peripheral

Clock Enable

ADC Clock

Analog

RNG Seed

APB2 Timer

Clock

PLLCLK

HSI

HSE

LSE

MCO

Main

Clock Output

MCO

SYSCLK

LSI

HSI 48 MSEL

Peripheral Clock Enable

Other

Peripheral

Qspi/Tck/SDIO

LSI

I2C/SPI

Figure 3. Clock tree

www.mm32mcu.com

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MM32F103CET Datasheet(PDF) 20 Page - MindMotion Microelectronics

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