STWBC2-HP datasheet(50/96 Pages) STMICROELECTRONICS

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To avoid this large transfer current associated with the rise of target voltage, an automatic voltage ramp can

be enabled. When activated, the ramp generator increments the target voltage value at the rate of AFE clock

(16 MHz typically) only if the feedback comparator is high and the maximum peak current is not reached. This

indirectly produces a rise of target voltage that tracks the progression of output voltage. This avoids having the

DC-DC entering in a high energy transfer mode to charge the output capacitor.

2.2.7.16

Programming

The BB-DCDC digital controller must be first configured according to the system application topology

implemented in the PCB.

Figure 52. BB-DCDC application topology configuration

The conversion type is configured through the DCDC_HW_CONFIG register fields as shown in the following

table:

Table 34. BB-DCDC conversion type configuration

Conversion type

BB-DCDC

BUCK_ONLY

BOOST_ONLY

Switch HSB

Switch LSA

Buck

Active(1)

Boost

Active(1)

Buck/boost

Active(1)

1. Toggling signal driven from BB-DCDC logic.

Table 35 shows the Boost HSA switch configuration mode:

Table 35. Boost switch configuration overview

Switch Boost side (after inductor)

Switch configuration

HSA_ACTIVE

Comment

High-side switch is diode

High-side switch is MOSFET

Table 36 shows the Buck LSB switch configuration mode:

STWBC2-HP

Digital AFE functions

DS13825 - Rev 1.0

page 50/96

STWBC2-HP Datasheet(PDF) 50 Page - STMicroelectronics