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STWBC2-HP Datasheet(PDF) 68 Page - STMicroelectronics

Part # STWBC2-HP
Description  Digital controller for wireless battery charger transmitters
PDF  96 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STWBC2-HP Datasheet(HTML) 68 Page - STMicroelectronics

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Figure 68. Single byte read access
2.2.13.3.3
Multiple byte write access with address auto-increment:
The auto-increment is activated with a specific signal of the I/F.
The first byte transmitted by the master after NSS goes low corresponds to the initial access address. The MSB of
this byte is 0, meaning that it is a write access. During the transmission of the first byte, the slave transmits 8bits
data at 0.
The second byte sent by the master is the 8bits data to be written at the requested address. While the data
byte to be written is sent by the master, the slave transmits the value at address+1. This offers the possibility to
combine a write and read on adjacent address.
For each following byte, the address of the access is automatically incremented up to 0x7F. When 0x7F is
reached, the address is no more incremented.
The write process stops when NSS comes high.
Figure 69. Multiple byte write with address auto-increment
2.2.13.3.4
Multiple byte write access at fixed address:
The auto-increment is deactivated with a specific signal of the I/F.
The first byte transmitted by the master after NSS goes low corresponds to the initial access address. The MSB of
this byte is 0, meaning that it is a write access. During the transmission of the first byte, the slave transmits 8bits
data at 0.
The second byte sent by the master is the 8bits data to be written at the requested address. While the data
byte to be written is sent by the master, the slave transmits the value at address+1. This offers the possibility to
combine a write and read on adjacent address.
For each following byte, the address of the access is the same. This mode of operation fits perfectly with a FIFO
fill operation.
The write process stops when NSS comes high.
Figure 70. Multiple byte write with fixed address
2.2.13.3.5
Multiple byte read access with explicit addresses:
The first byte transmitted by the master after NSS goes low corresponds to the first access address. The MSB of
this byte is 1, meaning that it is a read access. During the transmission of the first byte, the slave transmits 8bits
data at 0.
Each following byte transmitted by the master corresponds to a new address on which the read has to be done.
These bytes must have their MSB bit at 1. During the transmission of the new address, the slave responds to the
data read at the previous address request.
The read process stops when NSS comes high.
STWBC2-HP
Digital AFE functions
DS13825 - Rev 1.0
page 68/96



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