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STM32WBA50KG Datasheet(PDF) 47 Page - STMicroelectronics |
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STM32WBA50KG Datasheet(HTML) 47 Page - STMicroelectronics |
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47 / 110 page  DS14688 Rev 1 47/110 STM32WBA50KG Functional overview 50 • Dual-clock domain with dedicated kernel clock for peripherals independent from PCLK • Auto baud rate detection • Programmable data word length (7, 8, or 9 bits) • Programmable data order with MSB-first or LSB-first shifting • Configurable stop bits (1 or 2 stop bits) • Synchronous Master/Slave mode and clock output/input for synchronous communications • SPI slave transmission underrun error flag • Single-wire half-duplex communications • Continuous communications using DMA • Received/transmitted bytes are buffered in reserved SRAM using centralized DMA • Separate enable bits for transmitter and receiver • Separate signal polarity control for transmission and reception • Swappable Tx/Rx pin configuration • Hardware flow control for modem and RS-485 transceiver • Communication control/error detection flags • Parity control: – Transmits parity bit – Checks parity of received data byte • Interrupt sources with flags • Multiprocessor communications: wake-up from Mute mode by idle line detection or address mark detection • Autonomous functionality in Stop mode with wake-up from stop capability • LIN master synchronous break send capability and LIN slave break detection capability – 13-bit break generation and 10/11-bit break detection when USART is hardware configured for LIN • IrDA SIR encoder decoder supporting 3/16-bit duration for Normal mode • Smartcard mode – Supports the T = 0 and T = 1 asynchronous protocols for smartcards as defined in the ISO/IEC 7816-3 standard – 0.5 and 1.5 stop bits for Smartcard operation • Support for Modbus communication – Timeout feature – CR/LF character recognition 3.27.2 LPUART The LPUART supports bidirectional asynchronous serial communication with minimum power consumption. It also supports half-duplex single-wire communication and modem operations (CTS/RTS). It allows multiprocessor communication. Only a 32.768 kHz clock (LSE) is needed to allow LPUART communication up to 9600 baud. Therefore, even in Stop mode, the LPUART can wait for an incoming frame while having an extremely low energy consumption. Higher-speed clock can be used to reach higher baudrates. |
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