STM32WBA50KG datasheet(33/110 Pages) STMICROELECTRONICS

33 / 110 page

DS14688 Rev 1

33/110

STM32WBA50KG

Functional overview

3.15

Interrupts and events

3.15.1

Nested vectored interrupt controller (NVIC)

The devices embed a NVIC (nested vectored interrupt controller) that is able to manage 16

priority levels and to handle up to 72 maskable interrupt vectors plus the 16 interrupt vectors

of the Cortex-M33.

The NVIC benefits are the following:

•

closely coupled NVIC giving low-latency interrupt processing

•

interrupt entry vector table address passed directly to the core

•

early processing of interrupts

•

processing of late arriving higher priority interrupts

•

support for tail chaining

•

processor state automatically saved

•

interrupt entry restored on interrupt exit with no instruction overhead

The NVIC hardware block provides flexible interrupt management features with minimal

interrupt latency.

3.15.2

Extended interrupt/event controller (EXTI)

The EXTI (extended interrupts and event controller) manages the individual CPU and

system wake-up through configurable event inputs. It provides wake-up requests to the

power control, and generates an interrupt request to the CPU NVIC and events to the CPU

event input.

The EXTI wake-up requests allow the system to be woken up from Stop modes.

The interrupt request and event request generation can also be used in Run and Sleep

modes. The EXTI also includes the peripheral interconnect EXTI multiplexer I/O port

selection.

The EXTI main features are the following:

•

All event inputs allowed to wake up the system

•

Configurable events (signals from I/Os or peripherals able to generate a pulse)

–

Selectable active trigger edge

–

Interrupt pending status register bit independent for the rising and falling edge

–

Individual interrupt and event generation mask, used for conditioning the CPU

wake-up, interrupt and event generation

–

Software trigger possibility

•

EXTI I/O port selection for peripheral interconnect use.

Table 9. GPDMA1 autonomous mode and wake-up in low-power modes

Feature

Low-power modes

Autonomous mode and wake-up

Sleep, Stop 0 modes

STM32WBA50KG Datasheet(PDF) 33 Page - STMicroelectronics

STM32WBA50KG Datasheet(HTML) 33 Page - STMicroelectronics

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL