STM32WBA50KG datasheet(66/110 Pages) STMICROELECTRONICS

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Electrical characteristics

STM32WBA50KG

66/110

DS14688 Rev 1

5.3.5

Embedded reset and power control block characteristics

The parameters in Table 34 are derived under ambient temperature and supply voltage

conditions summarized in Table 26.

Table 34. Embedded reset and power control block characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

tRSTTEMPO(1)

Reset temporization after VBOR0 threshold detection VDD rising

900

μs

VBOR0(2)

Brown-out reset threshold 0

VDD rising

1.60

1.66

1.71

VDD falling

1.58

1.64

1.69

VBOR1(2)

Brown-out reset threshold 1

VDD rising

1.98

2.08

2.17

VDD falling

1.90

2.00

2.10

VBOR2(2)

Brown-out reset threshold 2

VDD rising

2.18

2.29

2.39

VDD falling

2.08

2.18

2.25

VBOR3(2)

Brown-out reset threshold 3

VDD rising

2.48

2.59

2.70

VDD falling

2.39

2.50

2.61

VBOR4(2)

Brown-out reset threshold 4

VDD rising

2.76

2.88

3.00

VDD falling

2.67

2.79

2.90

VPVD0(2)

Programmable voltage detector threshold 0

VDD rising

2.03

2.13

2.23

VDD falling

1.93

2.03

2.12

VPVD1(2)

PVD threshold 1

VDD rising

2.18

2.29

2.39

VDD falling

2.08

2.18

2.28

VPVD2(2)

PVD threshold 2

VDD rising

2.33

2.44

2.55

VDD falling

2.23

2.34

2.44

VPVD3(2)

PVD threshold 3

VDD rising

2.47

2.59

2.70

VDD falling

2.39

2.50

2.61

VPVD4(2)

PVD threshold 4

VDD rising

2.60

2.72

2.83

VDD falling

2.50

2.62

2.73

VPVD5(2)

PVD threshold 5

VDD rising

2.76

2.88

3.00

VDD falling

2.66

2.78

2.90

VPVD6(2)

PVD threshold 6

VDD rising

2.83

2.96

3.08

VDD falling

2.76

2.88

3.00

Vhyst_BOR0(2)

BOR0 hysteresis voltage

Vhyst_BOR_PVD(2) BOR1, 2, 3, 4 and PVD hysteresis voltage

tsampling_BOR0(2) BOR0 ultra-low power sampling monitoring period

ULPEN = 1

IDD_BOR_PVD(1)

BOR1, 2, 3, 4 and PVD consumption from VDD,

and additional BOR0 consumption for ULPMEN = 0

vs. ULPMEN = 1 (3)

1.7

2.5

μA

1. Specified by design, not tested in production.

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