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STM32WBA50KG Datasheet(PDF) 29 Page - STMicroelectronics

Part # STM32WBA50KG
Description  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with FPU, Bluetooth® 5.4 radio solution
PDF  110 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WBA50KG Datasheet(HTML) 29 Page - STMicroelectronics

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DS14688 Rev 1
29/110
STM32WBA50KG
Functional overview
50
•
Peripheral clock sources: several peripherals have their own independent kernel clock
whatever the system clock. The PLL has three independent outputs allowing the
highest flexibility and can generate clocks for the ADC and the RNG.
•
Startup clock: after reset, the microcontroller restarts by default with the HSI16. The
prescaler ratio and clock source can be changed by the application program as soon
as the code execution starts.
•
CSS (Clock security systems): these features can be enabled by software.
–
If a HSE32 clock failure occurs, the system clock automatically switches to HSI16
and a software interrupt is generated if enabled.
–
LSE failure can also be detected and generates an interrupt, in this case the clock
switches to LSI.
•
Clock-out capability:
–
MCO (microcontroller clock output): outputs one of the internal clocks for external
use by the application. (only available in Run, Sleep and Stop mode)
–
LSCO (low-speed clock output): outputs LSI or LSE in all operating modes.
Several prescalers allow AHB and APB frequencies configuration. The maximum frequency
of the AHB and the APB clock domains is 100 MHz, except for AHB5 domain, limited to
32 MHz.



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