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STM32WBA50KG Datasheet(PDF) 48 Page - STMicroelectronics

Part # STM32WBA50KG
Description  Multiprotocol wireless 32-bit MCU Arm®-based Cortex®-M33 with FPU, Bluetooth® 5.4 radio solution
PDF  110 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

STM32WBA50KG Datasheet(HTML) 48 Page - STMicroelectronics

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Functional overview
STM32WBA50KG
48/110
DS14688 Rev 1
The LPUART interface can be served by the DMA controller.
The LPUART main features are:
•
Full-duplex asynchronous communications
•
NRZ standard format (mark/space)
•
Programmable baud rate
•
From 300 baud/s to 9600 baud/s using a 32.768 kHz clock source
•
Higher baud rates can be achieved by using a higher frequency clock source
•
Two internal FIFOs to transmit and receive data, each of them can be enabled/disabled
by software and come with status flags for FIFOs states
•
Dual-clock domain with dedicated kernel clock for peripherals independent from PCLK
•
Programmable data word length (7, 8, or 9 bits)
•
Programmable data order with MSB-first or LSB-first shifting
•
Configurable stop bits (1 or 2 stop bits)
•
Single-wire half-duplex communications
•
Continuous communications using DMA
•
Received/transmitted bytes are buffered in reserved SRAM using centralized DMA
•
Separate enable bits for transmitter and receiver
•
Separate signal polarity control for transmission and reception
•
Swappable Tx/Rx pin configuration
•
Hardware flow control for modem and RS-485 transceiver
•
Transfer detection flags:
–
Receive buffer full
–
Transmit buffer empty
–
Busy and end of transmission flags
•
Parity control:
–
Transmits parity bit
–
Checks parity of received data byte
•
Four error detection flags:
–
Overrun error
–
Noise detection
–
Frame error
–
Parity error
•
Interrupt sources with flags
•
Multiprocessor communications: wake-up from Mute mode by idle line detection or
address mark detection
•
Autonomous functionality in Stop mode with wake-up from Stop capability
3.28
Serial peripheral interface (SPI)
The devices embed one SPI (serial peripheral interfaces) that can be used to communicate
with external devices while using the specific synchronous protocol. The SPI protocol
supports half-duplex, full-duplex and simplex synchronous, serial communication with
external devices.



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