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STM32WBA50KG Datasheet(PDF) 26 Page - STMicroelectronics |
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STM32WBA50KG Datasheet(HTML) 26 Page - STMicroelectronics |
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26 / 110 page ![]() Functional overview STM32WBA50KG 26/110 DS14688 Rev 1 Here below some use-cases that can be done while remaining in Stop mode: • A/D conversion triggered by a low-power timer (or any other trigger) – wake-up from Stop mode on analog watchdog if the A/D conversion result is out of programmed thresholds – wake-up from Stop mode on DMA buffer event • I2C slave reception or transmission, SPI reception, UART/LPUART reception – wake-up at the end of peripheral transfer or on DMA buffer event • I2C master transfer, SPI transmission, UART/LPUART transmission, triggered by a low-power timer (or any other trigger): – example: sensor periodic read – wake-up at the end of peripheral transfer or on DMA buffer event • Bridges between peripherals – example: ADC converted data transferred by communication peripherals • Data transfer from/to GPIO to/from SRAM for: – controlling external components – implementing data transmission and reception protocols Table 7. Functionalities depending on the working mode(1) Peripheral Run Sleep Stop 0 Stop 1 Standby retention Standby - - - CPU Y R R -R -- -- - Flash memory O(2) O(2) R -R -R -R - SRAM1 O O O(3) -O(3) -O(3) -O(3) - SRAM2 O O O(3) O(4) O(3) O(3) -O(3) - Backup registers O O O -R -R -R - ICACHE O R R -R -- -- - 2.4 GHz RADIO O R O R O R OR -- -- - 2.4 GHz RADIO SRAM OROROR -R -R -- - SLEEP_TIMER O O O OO OO O- - BOR Y Y Y YY YY YY Y PVD O O O OO O- -- - HSI16 O O O(5) -O(5) -- -- - HSE32 O O O(6) - -- -- -- - LSI O O O -O -O -O - LSE O O O -O -O -O - HSECSS O O O - O- -- -- - |
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