STM32WBA50KG datasheet(75/110 Pages) STMICROELECTRONICS

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DS14688 Rev 1

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STM32WBA50KG

Electrical characteristics

103

5.3.8

Wake-up time from low-power modes and voltage scaling

transition times

The times given in Table 45 are the latency between the event and the execution of the first

user instruction (FSTEN = 1 in PWR_CR3 if not mentioned differently).

The device goes in Low-power mode after the WFE (Wait For Event) instruction.

1. Evaluated by characterization, not tested in production, unless otherwise specified.

2. The AHB bus is automatically active when at least one peripheral is ON on the AHB or associated APB.

3. RADIO inactive.

4. The AHB to APB bridge is automatically active when at least one peripheral is ON on the APB.

Table 45. Low-power mode wake-up timings(1)

Symbol

Parameter

Conditions

Typ

Max

Unit

tWU(Sleep)

Wake-up time from Sleep to Run mode

SLEEP_PD = 0

CPU clock cycles

tWU(Stop 0)

Wake-up time from Stop 0 to Run mode

in flash memory

FLASHFWU = 0

9.98

µs

Wake-up time from Stop 0 to Run mode

in SRAM2

10.36

tWU(Stop 1)

Wake-up time from Stop 1 to Run mode

in flash memory

FLASHFWU = 0

24.10

Wake-up time from Stop 1 to Run mode

in SRAM2

24.66

tWU(Standby

with Retention)

Wake-up time from Standby retention to

Run mode in flash memory

FLASHFWU = 0

48.5

Wake-up time from Standby retention to

Run mode in SRAM2

48.5

tWU(Standby)

Wake-up time from Standby to Run mode

in flash memory

FSTEN = 1

101.6

FSTEN = 0

553.4

1. Evaluated by characterization, not tested in production, unless otherwise specified.

Table 46. Wake-up time using USART/LPUART(1)

Symbol

Parameter

Typ

Max

Unit

,tWUUSART

tWULPUART

Wake-up time needed to calculate the maximum USART/LPUART

baudrate needed to wake up from Stop mode when USART/LPUART

kernel clock source is HSI16

-tsu(HSI16) max

µs

1. Specified by design, not tested in production.

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