STM32WBA50KG datasheet(85/110 Pages) STMICROELECTRONICS

85 / 110 page

DS14688 Rev 1

85/110

STM32WBA50KG

Electrical characteristics

103

Note:

For information on I/O configuration, refer to AN4899 “STM32 GPIO configuration for

hardware settings and low-power consumption”.

Table 61. I/O static characteristics

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

VIL

I/O input

low level voltage

1.58 V ≤ VDD ≤ 3.6 V

0.3 x VDD

VIH

I/O input

high level voltage

0.7 x VDD

Vhys(1) Input hysteresis

250

Ilkg(1)

I/O input leakage

current(2)(3)

VIN ≤ Max(VDD, VDDA)-

150

Max(VDD, VDDA) < VIN ≤ Max(VDD, VDDA) + 1 V

2000

Max(VDD, VDDA) + 1 V < VIN ≤ 5.5 V

500

RPU

Weak pull-up

equivalent resistor(4)

-30

kΩ

RPD

Weak pull-down

equivalent resistor(4)

-30

CIO

I/O pin capacitance

1. Specified by design, not tested in production.

2. This parameter represents the pad leakage of the I/O itself. The total product pad leakage is provided by the following

formula: ITotal_Ileak_max = 10 μA + [number of I/Os where VIN is applied on the pad] x Ilkg max.

3. To sustain a voltage higher than Min (VDD, VDDA) + 0.3 V, the internal pull-up and pull-down resistors must be disabled.

4. The pull-up and pull-down resistors are designed with a true resistance in series with a switchable PMOS/NMOS. This

PMOS/NMOS contribution to the series resistance is minimal (~10%).

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