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STM32WBA50KG Datasheet(PDF) 41 Page - STMicroelectronics |
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STM32WBA50KG Datasheet(HTML) 41 Page - STMicroelectronics |
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41 / 110 page ![]() DS14688 Rev 1 41/110 STM32WBA50KG Functional overview 50 3.23.1 Advanced-control timers (TIM1) The advanced-control timers can each be seen as a three-phase PWM multiplexed on six channels. They have complementary PWM outputs with programmable inserted dead-times. They can also be seen as complete general-purpose timers. The four independent channels can be used for: • Input capture • Output compare • PWM generation (edge- or center-aligned modes) with full modulation capability (0 - 100%) • One-pulse mode output In Debug mode, the advanced-control timer counter can be frozen and the PWM outputs disabled to turn off any power switches driven by these outputs. Many features are shared with the general-purpose TIMx timers (described in the next section) using the same architecture, so the advanced-control timers can work together with the TIMx timers via the Timer Link feature for synchronization or event chaining. 3.23.2 General-purpose timers (TIM2, TIM16) There are two synchronizable general-purpose timers embedded in the device (see Table 14 for differences). Each general-purpose timer can be used to generate PWM outputs, or act as a simple time base. • TIM2 – Full-featured general-purpose timer with 32-bit auto-reload up/downcounter, with 16-bit prescaler. – Feature four independent channels for input capture/output compare, PWM or one-pulse mode output. They can work together, or with the other general-purpose timers via the Timer Link feature for synchronization or event chaining. – The counters can be frozen in Debug mode. – Independent DMA request generation, support of quadrature encoders. • TIM16 – General-purpose timers with mid-range features. – 16-bit auto-reload upcounters and 16-bit prescalers. and one channel and one complementary channel. – All channels can be used for input capture/output compare, PWM or one-pulse mode output. – The counters can be frozen in Debug mode. – Independent DMA request generation. 3.23.3 Low-power timer (LPTIM1) The devices embed one low-power timer, with an independent clock, running in Stop mode if clocked by HSI16, LSE, LSI, or an external clock. This timer is able to wake up the system from Stop mode. LPTIM1 is active in Stop modes. The low-power timer supports the following features: |
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