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SN8F5708 Datasheet(PDF) 58 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 58 Page - SONiX Technology Company |
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58 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. Interrupt Datasheet Rev. 2.4 58 10 Interrupt The MCU provides 19 interrupt sources (3 external and 16 interrupt) with 4 priority levels. Each interrupt source includes one or more interrupt request flag(s). When interrupt event occurs, the associated interrupt flag is set to logic 1. If both interrupt enable bit and global interrupt (EAL=1) are enabled, the interrupt request is generated and interrupt service routine (ISR) will be started. Most interrupt request flags must be cleared by software. However, some interrupt request flags can be cleared by hardware automatically. In the end, ISR is finished after complete the RETI instruction. The summary of interrupt source, interrupt vector, priority order and control bit are shown as the table below. Interrupt Enable Interrupt Request (IRQ) IRQ Clearance Priority / Vector System Reset - - - 0 / 0x0000 INT0 EX0 IE0 Automatically 1 / 0x0003 PWM1 EPWM1 PWM1F By firmware 2 / 0x0083 I2C EI2C SI By firmware 3 / 0x0043 Timer 0 ET0 TF0 Automatically 4 / 0x000B PWM2 EPWM2 PWM2F By firmware 5 / 0x008B SPI ESPI SPIF / MODF By firmware 6 / 0x004B INT1 EX1 IE1 Automatically 7 / 0x0013 PWM3 EPWM3 PWM3F By firmware 8 / 0x0093 T2COM0 ET2C0 TF2C0 Automatically 9 / 0x0053 Timer 1 ET1 TF1 Automatically 10 / 0x001B ADC EADC ADCF By firmware 11 / 0x009B T2COM1 ET2C1 TF2C1 Automatically 12 / 0x005B UART ES0 TI0 / RI0 By firmware 13 / 0x0023 Comparator 0 ECMP0 CMP0F By firmware 14 / 0x00A3 T2COM2 ET2C1 TF2C2 Automatically 15 / 0x0063 Timer 2 ET2 / ET2RL TF2 / TF2RL By firmware 16 / 0x002B Comparator 1 ECMP1 CMP1F By firmware 17 / 0x00AB INT2 EX2 IE2 Automatically 18 / 0x00EB T2COM3 ET2C3 TF2C3 Automatically 19 / 0x006B Note: Don’t clear Interrupt request flags by firmware when Interrupt request flags can be cleared by hardware automatically. |
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