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SN8F5708 Datasheet(PDF) 41 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 41 Page - SONiX Technology Company |
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41 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. Reset and Power-on Controller Datasheet Rev. 2.4 41 7.4 Watchdog Reset Watchdog is a periodic reset signal generator for the purpose of monitoring the execution flow. Its internal timer is expected to be cleared in a check point of program flow; therefore, the actual reset signal would be generated only after a software problem occurs. Writing 0x5A to WDTR is the proper method to place a check point in program. 1 WDTR = 0x5A; Watchdog timer interval time = 256 * 1/ (Internal Low-Speed oscillator frequency/WDT Pre-scalar) = 256 / (FILRC /WDT Pre-scaler) …sec Internal low-speed oscillator WDT pre-scaler Watchdog interval time FILRC =16 kHz FILRC /4 256/(16000/4)=64ms FILRC /8 256/(16000/8)=128ms FILRC /16 256/(16000/16)=256ms FILRC /32 256/(16000/32)=512ms The operation mode of watchdog is configurable in options file: Always mode counts its internal timer in all CPU operation modes (normal, IDLE, SLEEP); Enable mode counts its internal timer during CPU stays in normal mode, and it would not trigger watchdog reset in IDLE and STOP modes; Disable mode suspends its internal timer at all CPU modes, and the watchdog would not trigger in this condition. When watchdog is operating in always mode, the system will consume additional power. |
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