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SN8F5708 Datasheet(PDF) 43 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 43 Page - SONiX Technology Company |
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43 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. Reset and Power-on Controller Datasheet Rev. 2.4 43 7.7 Reset and Power-on Controller Registers Register Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 PFLAG POR WDT RST - - LVD24 LVD33 - SRST - - - - - - - SRSTREQ WDTR WDTR7 WDTR6 WDTR5 WDTR4 WDTR3 WDTR2 WDTR1 WDTR0 PFLAG Register Bit Field Type Initial Description 7 POR R - This bit is automatically set if the microcontroller has been reset by LVD. 6 WDT R - This bit is automatically set if the microcontroller has been reset by watchdog. 5 RST R - This bit is automatically set if the microcontroller has been reset by external reset pin. 4..3 Reserved R 0 2 LVD24 R - This bit is automatically set if the currently VDD pin is lower than 2.4 V 1 LVD33 R - This bit is automatically set if the currently VDD pin is lower than 3.3 V 0 Reserved R 0 SRST Register Bit Field Type Initial Description 7..1 Reserved R 0 0 SRSTREQ R/W 0 Consecutively set this bit for two times to trigger software reset. WDTR Register (0x86) Bit Field Type Initial Description 7..0 WDTR[7:0] W - Watchdog clear is controlled by WDTR register. Moving 0x5A data into WDTR is to reset watchdog timer. |
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