SN8F5708 datasheet(77/204 Pages) SONIX

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SN8F5708 Series

External Interrupt

Datasheet Rev. 2.4

13 External Interrupt

INT0, INT1 and INT2 are external interrupt trigger sources. Build in edge trigger configuration

function and edge direction is selected by PEDGE register. When both external interrupt

(EX0/EX1/EX2) and global interrupt (EAL) are enabled, the external interrupt request flag

(IE0/IE1/IE2) will be set to “1” as edge trigger event occurs. The program counter will jump to the

interrupt vector (ORG 0x0003/0x0013/0x00EB) and execute interrupt service routine. Interrupt

request flag will be cleared by hardware before ISR is executed.

13.1

External Interrupt Registers

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

PEDGE

EX2G1

EX2G0

EX1G1

EX1G0

EX0G1

EX0G0

IEN0

EAL

ET2

ES0

ET1

EX1

ET0

EX0

TCON

TF1

TR1

TF0

TR0

IE1

IE0

IEN4

EPWM1

EX2

PWM1F

IE2

PEDGE Register (0x8F)

Bit

Field

Type

Initial

Description

5..4

EX2G[1:0]

R/W

External interrupt 2 trigger edge control register.

00: Reserved.

01: Rising edge trigger.

10: Falling edge trigger (default)

11: Both rising and falling edge trigger

3..2

EX1G[1:0]

R/W

External interrupt 1 trigger edge control register.

00: Reserved.

01: Rising edge trigger.

10: Falling edge trigger (default)

11: Both rising and falling edge trigger

1..0

EX0G[1:0]

R/W

External interrupt 0 trigger edge control register.

00: Reserved.

01: Rising edge trigger.

10: Falling edge trigger (default)

11: Both rising and falling edge trigger

Else

Reserved

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