SN8F5708 datasheet(89/204 Pages) SONIX

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SN8F5708 Series

Timer 2

Datasheet Rev. 2.4

15 Timer 2

Timer 2 is a 16-bit up counting timer which has several optional extensions: specified reload value,

comparison output (PWM) and capture function. Timer 2 consists of a dedicated 16-bit

counter/timer and four 16-bit capture/compare modules. Each capture/compare module has its

own associated I/O when enabled. Each capture/compare module may be configured to operate

independently in one of 3 modes: compare, capture with rising edge, or capture with register be

written.

16-bit Counter/Timer

TH2/TL2

Capture/compare

module CRC

Capture/compare

module CC1

Capture/compare

module CC2

Capture/compare

module CC3

T2COM0

T2COM1

T2COM2

T2COM3

T2CC0

T2CC1

T2CC2

T2CC3

Timer 2 clock

15.1

Timer 2 Up-counting Control

Timer 2 has three operation modes by its clock source: specify fcpu clocks (fcpu/12 and fcpu/24),

specify fcpu clocks with a stop control, and external clock input. The table below categorizes these

three operation modes and its related registers (T2I1, T2I0 and T2PS). Once the timer’s counter is

overflow (counts from 0xFFFF to 0x0000), TF2 would be issued immediately which can read/write

by firmware. Timer 2 interrupt function is controlled by ET2.

T2I1

T2I0

T2PS

Timer 2 Clock Source

Disable Timer 2

fcpu/12

fcpu/24

fcpu/12 (stop counting when T2 pin is low, resume when T2 is high)

fcpu/24 (stop counting when T2 pin is low, resume when T2 is high)

T2 pin rising edge (T2 pin is shared with P2.3, clock rate ≤ 0.5 * fcpu)

SN8F5708 Datasheet(PDF) 89 Page - SONiX Technology Company

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