SN8F5708 datasheet(86/204 Pages) SONIX

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SN8F5708 Series

Timer 0 and Timer 1

Datasheet Rev. 2.4

TR0

R/W

Timer 0 function

0: Disable

1: Enable

IE1

Refer to INT1

Reserved

IE0

Refer to INT0

Reserved



Note: Before clear one of TF0, TF1, IE0 or IE1 flag manually by firmware, user must

be made sure others request flag in TCON register doesn’t active.

TCON0 Register (0xE7)

Bit

Field

Type

Initial

Description

T0EXT

R/W

Timer 0 real time counter

0: Disable

1: Enable

6..4

T0RATE[2:0]

R/W

000

Clock divider of Timer 0 external clock source

000: f EXT0 / 128

001: f EXT0 / 64

010: f EXT0 / 32

011: f EXT0 / 16

100: f EXT0 / 8

101: f EXT0 / 4

110: f EXT0 / 2

111: f EXT0 / 1

Reserved

2..0

T1RATE[2:0]

R/W

000

Clock divider of Timer 0 external clock source

000: f EXT1 / 128

001: f EXT1 / 64

010: f EXT1 / 32

011: f EXT1 / 16

100: f EXT1 / 8

101: f EXT1 / 4

110: f EXT1 / 2

111: f EXT1 / 1

* T0EXT = 1 is reserved for ‘IHRC 32 MHz with RTC’ CPU clock source only; remaining ‘0’ if other source is chosen.

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