SN8F5708 datasheet(38/204 Pages) SONIX

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SN8F5708 Series

Reset and Power-on Controller

Datasheet Rev. 2.4

option items are as following table:

Code Option

Content

Function Description

Program Memory

Security

Security Disable

Disable ROM code Security function

Security Enable

Enable ROM code Security function

CPU Clock Source

IHRC 32MHz

High speed internal 32MHz RC. XIN/XOUT

pins are bi-direction GPIO mode

IHRC 32MHz with RTC

High speed internal 32MH RC with low speed

crystal/resonator (e.g. 32.768kHz). Low

speed crystal/resonator for Timer 0 real time

clock.

X’tal 12MHz

High speed crystal /resonator (e.g. 12MHz)

for external high clock oscillator

X’tal 4MHz

Standard crystal /resonator (e.g. 4M) for

external high clock oscillator

External Clock

XIN pin connect external clock (1M ~32M),

XOUT pin is bi-direction GPIO mode

Noise Filter

Disable

Disable Noise Filter

Enable

Enable Noise Filter

LVD

LVD_L

LVD will reset chip if VDD is below 1.8V.

LVD_M

LVD will reset chip if VDD is below 1.8V. The

LVD24 flag will indicate if VDD is below 2.4V.

LVD_H

LVD will reset chip if VDD is below 2.4V. The

LVD33 flag will indicate if VDD is below 3.3V.

LVD_Max

LVD will reset chip if VDD is below 3.3V

External Reset

Reset with De-bounce

Enable External reset pin with De-bounce

Reset without De-bounce

Enable External reset pin without De-bounce

GPIO with P02

Enable P02

Watchdog Reset

Always

Watchdog timer is always on enable even in

STOP mode and IDLE mode

Enable

Enable watchdog timer. Watchdog timer

stops in STOP mode and IDLE mode

Disable

Disable Watchdog function

Watchdog Overflow

Period

64ms

Watchdog timer clock source FILRC /4

128ms

Watchdog timer clock source FILRC /8

256ms

Watchdog timer clock source FILRC /16

512ms

Watchdog timer clock source FILRC /32

SN8F5708 Datasheet(PDF) 38 Page - SONiX Technology Company

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