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SN8F5708 Datasheet(PDF) 52 Page - SONiX Technology Company |
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SN8F5708 Datasheet(HTML) 52 Page - SONiX Technology Company |
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52 / 204 page ![]() www.sonix.com.tw SN8F5708 Series Copyright © 2019, SONiX Technology Co., Ltd. System Clock and Power Management Datasheet Rev. 2.4 52 CLKSEL Register (0xE5) Bit Field Type Initial Description 7..3 Reserved R 0x00 2..0 CLKSEL[2:0] R/W 111 CLKSEL would be applied by writing CLKCMD. 000: fcpu = fosc / 128 001: fcpu = fosc / 64 010: fcpu = fosc / 32 011: fcpu = fosc / 16 100: fcpu = fosc / 8 101: fcpu = fosc / 4 110: fcpu = fosc / 2 111: fcpu = fosc / 1 CLKCMD Register (0xE6) Bit Field Type Initial Description 7..0 CMD[7:0] W 0x00 Writing 0x69 to apply CLKSEL’s setting. PCON Register (0x87) Bit Field Type Initial Description 7 Refer to other chapter(s) 6..4 Reserved R 0x00 3 P2SEL R/W 1 High-order address byte configuration bit. Chooses the higher byte of address (“XRAM[15:8]”) during MOVX @Ri operations 0: The “XRAM[15:8]” = “P2REG”. The “P2REG” is the contents of Port2 output register. 1: The “XRAM[15:8]” = 0x00. 2 GF0 R/W 0 General Purpose Flag 1 STOP R/W 0 1: Microcontroller switch to STOP mode 0 IDLE R/W 0 1: Microcontroller switch to IDLE mode P1W Register (0x91) Bit Field Type Initial Description 7..0 P1nW R/W 0 0: Disable P1.n wakeup functionality 1: Enable P1.n wakeup functionality |
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