71M6541DSLASHFSLASHG datasheet(55/166 Pages) MAXIM

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71M6541D/F/G and 71M6542F/G Data Sheet

Rev 5

STEMP[10:0]

(10+S)

(decimal)

Temp (

oC)

(Equation)

STEMP[10:0]>>2

(8+S)

(decimal)

Limiter Output

(6+S)

(decimal)

Temp (

oC)

(LU Table)

22.00

22.65

22.33

22.65

22.98

23.31

23.96

23.64

23.96

24.29

…

252

104.40

105.06

253

104.73

254

105.06

255

105.39

For proper operation, the MPU must load the lookup table with values that reflect the crystal properties

with respect to temperature, which is typically done once during initialization. Since the lookup table is

not directly addressable, the MPU uses the following procedure to load the entire NV RAM table:

Set the LKPAUTOI bit (I/O RAM 0x2887[7]) to enable address auto-increment.

Write zero into the I/O RAM register LKPADDR[6:0] (I/O RAM 0x2887[6:0]).

Write the 8-bit datum into I/O RAM register LKPDAT (I/O RAM 0x2888).

Set the LKP_WR bit (I/O RAM 0x2889[0]) to write the 8-bit datum into NV_RAM

Wait for LKP_WR to clear (LKP_WR auto-clears when the data has been copied to NV RAM).

Repeat steps 3 through 5 until all data has been written to NV RAM.

The NV RAM table can also be read by writing a 1 into the LKP_RD bit (I/O RAM 0x2889[1]). The process of

reading from and writing to the NV RAM is accelerated by setting the LKPAUTOI bit (I/O RAM 0x2887[7]).

When LKPAUTOI is set, LKPADDR[6:0] auto-incremented every time LKP_RD or LKP_WR is pulsed. It is

also possible to perform random access of the NV RAM by writing a 0 to the LKPAUTOI bit and loading the

desired address into LKPADDR[6:0].

If the oscillator temperature compensation feature is not being used, it is possible to use the NV

RAM storage area as ordinary NV storage space using the procedure described above to read and

write NV RAM data. In this case, keep the OSC_COMP bit (I/O RAM 0x28A0[5]) reset to disable the

automatic oscillator temperature compensation feature.

2.5.4.5 RTC Interrupts

The RTC generates interrupts each second and each minute. These interrupts are called RTC_1SEC and

RTC_1MIN. In addition, the RTC functions as an alarm clock by generating an interrupt when the minutes

and hours registers both equal their respective target counts as defined in Table 45. The alarm clock

interrupt is called RTC_T. All three interrupts appear in the MPU’s external interrupt 6. See Table 33

in the interrupt section for the enable bits and flags for these interrupts.

The target registers for minutes and hours are listed in Table 45.

Table 45: I/O RAM Registers for RTC Interrupts

Name

Location Rst

Dir

Description

RTC_TMIN[5:0]

289E[5:0]

R/W The target minutes register. See RTC_THR[4:0] below.

RTC_THR[4:0]

289F[4:0]

R/W The target hours register. The RTC_T interrupt occurs

when RTC_MIN becomes equal to RTC_TMIN and

RTC_HR becomes equal to RTC_THR.

71M6541D/F/G Datasheet(PDF) 55 Page - Maxim Integrated Products

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