71M6541DSLASHFSLASHG datasheet(75/166 Pages) MAXIM

75 / 166 page

71M6541D/F/G and 71M6542F/G Data Sheet

Rev 5

A15

A14

(From Host) SPI_CSZ

(From Host) SPI_CK

(From Host) SPI_DI

(From 6543) SPI_DO

8 bit CMD

16 bit Address

DATA[ADDR]

DATA[ADDR+1]

Extended Read . . .

SERIAL READ

A15

A14

8 bit CMD

16 bit Address

DATA[ADDR]

DATA[ADDR+1]

Extended Write . . .

SERIAL WRITE

HI Z

Status Byte

ST7

ST6

ST5

ST0

Status Byte

ST7

ST6

ST5

ST0

(From Host) SPI_CSZ

(From Host) SPI_CK

(From Host) SPI_DI

(From 6543) SPI_DO

Figure 27: SPI Slave Port - Typical Multi-Byte Read and Write Operations

Table 63: SPI Command Sequences

Command Sequence

Description

ADDR 1xxx xxxx STATUS

Byte0 ... ByteN

Read data starting at ADDR. ADDR auto-increments until SPI_CSZ is

raised. Upon completion, SPI_CMD (SFR 0xFD) is updated to 1xxx xxxx

and an SPI interrupt is generated. The exception is if the command byte

is 1000 0000. In this case, no MPU interrupt is generated and SPI_CMD

is not updated.

ADDR 0xxx xxxx STATUS

Byte0 ... ByteN

Write data starting at ADDR. ADDR auto-increments until SPI_CSZ is

raised. Upon completion, SPI_CMD is updated to 0xxx xxxx and an SPI

interrupt is generated. The exception is if the command byte is 0000

0000. In this case, no MPU interrupt is generated and SPI_CMD is not

updated.

71M6541D/F/G Datasheet(PDF) 75 Page - Maxim Integrated Products

71M6541D/F/G Datasheet(HTML) 75 Page - Maxim Integrated Products

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL