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71M6541D/F/G Datasheet(PDF) 79 Page - Maxim Integrated Products |
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71M6541D/F/G Datasheet(HTML) 79 Page - Maxim Integrated Products |
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79 / 166 page ![]() 71M6541D/F/G and 71M6542F/G Data Sheet Rev 5 79 The TMUXOUT and TMUX2OUT pins may be used for diagnostics purposes during the product development cycle or in the production test. The RTC 1-second output may be used to calibrate the crystal oscillator. The RTC 4-second output provides higher precision for RTC calibration. RTCLK may also be used to calibrate the RTC. Table 65: TMUX[5:0] Selections TMUX[5:0] Signal Name Description 1 RTCLK 32.768 kHz clock waveform 9 WD_RST Indicates when the MPU has reset the watchdog timer. Can be monitored to determine spare time in the watchdog timer. A CKMPU MPU clock – see Table 9 D V3AOK bit Indicates that the V3P3A pin voltage is ≥ 3.0 V. The V3P3A and V3P3SYS pins are expected to be tied together at the PCB level. The 71M654x monitors the V3P3A pin voltage only. E V3OK bit Indicates that the V3P3A pin voltage is ≥ 2.8 V. The V3P3A and V3P3SYS pins are expected to be tied together at the PCB level. The 71M654x monitors the V3P3A pin voltage only. 1B MUX_SYNC Internal multiplexer frame SYNC signal. See Figure 6 and Figure 7. 1C CE_BUSY interrupt See 2.3.3 on page 25 and Figure 16 on page 47 1D CE_XFER interrupt 1F RTM output from CE See 2.3.5 on page 25 Note: All TMUX[5:0] values which are not shown are reserved. Table 66: TMUX2[4:0] Selections TMUX2[4:0] Signal Name Description 0 WD_OVF Indicates when the watchdog timer has expired (overflowed). 1 PULSE_1S One second pulse with 25% Duty Cycle. This signal can be used to measure the deviation of the RTC from an ideal 1 second interval. Multiple cycles should be averaged together to filter out jitter. 2 PULSE_4S Four second pulse with 25% Duty Cycle. This signal can be used to measure the deviation of the RTC from an ideal 4 second interval. Multiple cycles should be averaged together to filter out jitter. The 4 second pulse provides a more precise measurement than the 1 second pulse. 3 RTCLK 32.768 kHz clock waveform 8 SPARE[1] bit – I/O RAM 0x2704[1] Copies the value of the bit stored in 0x2704[1]. For general purpose use. 9 SPARE[2] bit – I/O RAM 0x2704[2] Copies the value of the bit stored in 0x2704[2]. For general purpose use. A WAKE Indicates when a WAKE event has occurred. B MUX_SYNC Internal multiplexer frame SYNC signal. See Figure 6 and Figure 7. C MCK See 2.5.3 on page 50 E GNDD Digital GND. Use this signal to make the TMUX2OUT pin static. 12 INT0 – DIG I/O Interrupt 0. See 2.4.8 on page 41. Also see Figure 16 on page 47. 13 INT1 – DIG I/O 14 INT2 – CE_PULSE 15 INT3 – CE_BUSY 16 INT4 - VSTAT 17 INT5 – EEPROM/SPI 18 INT6 – XFER, RTC 1F RTM_CK (flash) See 2.3.5 on page 25. Note: All TMUX2[4:0] values which are not shown are reserved. |
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