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R5F3640MNFB Datasheet(PDF) 37 Page - Renesas Technology Corp |
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R5F3640MNFB Datasheet(HTML) 37 Page - Renesas Technology Corp |
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37 / 398 page ![]() REJ09B0392-0064 Rev.0.64 Oct 12, 2007 Page 16 of 373 Under development Preliminary Specification Specification in this preliminary version is subject to change. M16C/64 Group 2. Central Processing Unit (CPU) 2.8.8 Stack Pointer Select Flag (U Flag) ISP is selected when the U flag is set to 0; USP is selected when the U flag is set to 1. The U flag is set to 0 when a hardware interrupt request is acknowledged or the INT instruction of soft- ware interrupt number 0 to 31 is executed. 2.8.9 Processor Interrupt Priority Level (IPL) IPL is 3 bits wide and assigns processor interrupt priority levels from level 0 to level 7. If a requested interrupt has higher priority than IPL, the interrupt is enabled. 2.8.10 Reserved Space Only write 0 to bits assigned as reserved bits. The read value is undefined. |
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