R5F3640MNFB datasheet(96/398 Pages) RENESAS

96 / 398 page

REJ09B0392-0064 Rev.0.64

Oct 12, 2007

Page 75 of 373

Under development

Preliminary Specification

Specification in this preliminary version is subject to change.

M16C/64 Group

10. Clock Generation Circuit

Figure 10.1

System Clock Generation Circuit

fC32

CM02, CM04, CM05, CM06, CM07 : bits in the CM0 register

CM10, CM11, CM14, CM16, CM17 : bits in the CM1 register

PCLK0, PCLK1 : bits in the PCLKR register

CM21, CM27

: bits in the CM2 register

XOUT

Main clock

oscillation circuit

CM02

CM04

CM10 = 1 (stop mode)

WAIT instruction

CM05

CPU clock

CM07=0

CM07=1

Divider

1/2

CM06 = 0

CM17 to CM16 = 00b

CM06 = 0

CM17 to CM16 = 01b

CM06 = 0

CM17 to CM16 = 10b

CM06 = 1

CM06 = 0

CM17 to CM16 = 11b

Details of the Divider

Subclock

oscillation circuit

XCIN

XCOUT

XIN

1/2

1/4

1/8

1/16

1/32

PLL

frequency

synthesizer

CM21=1

CM11

CM21=0

125 kHz

on-chip

oscillator

PLL

clock

Subclock

125 kHz

on-chip

oscillator

clock

BCLK

Main

clock

CLKOUT

PM01 to PM00 = 00b, CM01 to CM00 = 01b

PM01 to PM00 = 00b, CM01 to CM00 = 10b

CM01 to CM00 = 00b

I/O ports

PM01 to PM00 = 00b,

CM01 to CM00 = 11b

Oscillation

stop,

re-oscillation

detection

circuit

CM14

D4INT clock

fOCO-S

f32

1/32

Software reset

NMI

Interrupt request level judgement output

RESET

PM24

Brown-out reset

Watchdog timer reset

Oscillation stop detect reset

PM25

Oscillation stop

detection reset

Main

clock

Oscillation Stop, Re-Oscillation Detection Circuit

Oscillation stop,

re-oscillation

detection interrupt

signal

CM21 switch signal

CM27 = 0

CM27 = 1

Charge /

discharge

circuit

Reset

generating

circuit

Oscillation stop,

re-oscillation

detection interrupt

generating circuit

Pulse generation

circuit for clock

edge detection

and charge /

discharge control

Phase

comparator

Charge

pump

Voltage

control

oscillator

(VCO)

PLL clock

Main clock

Divider

1/32

Internal lowpass

filter

PLL Frequency Synthesizer

Reference

clock divider

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