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R5F3640MNFB Datasheet(PDF) 88 Page - Renesas Technology Corp |
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R5F3640MNFB Datasheet(HTML) 88 Page - Renesas Technology Corp |
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88 / 398 page  REJ09B0392-0064 Rev.0.64 Oct 12, 2007 Page 67 of 373 Under development Preliminary Specification Specification in this preliminary version is subject to change. M16C/64 Group 9. Memory Space Expansion Function Figure 9.1 DBR Register No register bits. If necessary, set to 0. Read as 0 b7 b6 b5 b4 b1 b2 b3 Data Bank Register (1) Symbol DBR Address 000Bh Bit Symbol Bit Name RW After Reset 00h b0 Function RW 1. Effective when bits PM01 and PM00 in the PM0 register are set to 01b (memory expansion mode) or 11b (microprocessor mode). BSR0 Bank selection bits — (b1-b0) — OFS RW — (b7-b6) — Offset bit 0 : Not offset 1 : Offset RW BSR1 RW BSR2 b5 b4 b3 0 0 0 : Bank 0 0 1 0 : Bank 2 1 0 0 : Bank 4 1 1 0 : Bank 6 b5 b4 b3 0 0 1 : Bank 1 0 1 1 : Bank 3 1 0 1 : Bank 5 1 1 1 : Bank 7 No register bits. If necessary, set to 0. Read as 0 NOTE : |
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