R5F3640MNFB datasheet(14/398 Pages) RENESAS

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TABLE OF CONTENTS

SFR Page Reference .......................................................................................................B-1

Overview .................................................................................................. 1

1.1

Features .............................................................................................................. 1

1.1.1

Applications .................................................................................................. 1

1.2

Specifications ...................................................................................................... 2

1.3

Product List ........................................................................................................ 4

1.4

Block Diagram ..................................................................................................... 6

1.5

Pin Assignments.................................................................................................. 7

1.6

Pin Functions..................................................................................................... 11

Central Processing Unit (CPU)............................................................... 14

2.1

Data Registers (R0, R1, R2 and R3)................................................................. 14

2.2

Address Registers (A0 and A1)......................................................................... 15

2.3

Frame Base Registers (FB)............................................................................... 15

2.4

Interrupt Table Register (INTB) ......................................................................... 15

2.5

Program Counter (PC) ...................................................................................... 15

2.6

User Stack Pointer (USP) and Interrupt Stack Pointer (ISP) ............................. 15

2.7

Static Base Register (SB).................................................................................. 15

2.8

Flag Register (FLG)........................................................................................... 15

2.8.1

Carry Flag (C Flag)..................................................................................... 15

2.8.2

Debug Flag (D Flag) ................................................................................... 15

2.8.3

Zero Flag (Z Flag)....................................................................................... 15

2.8.4

Sign Flag (S Flag)....................................................................................... 15

2.8.5

2.8.6

Overflow Flag (O Flag) ............................................................................... 15

2.8.7

Interrupt Enable Flag (I Flag)...................................................................... 15

2.8.8

Stack Pointer Select Flag (U Flag) ............................................................. 16

2.8.9

Processor Interrupt Priority Level (IPL) ...................................................... 16

2.8.10

Reserved Space ......................................................................................... 16

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