R5F3640MNFB datasheet(55/398 Pages) RENESAS

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REJ09B0392-0064 Rev.0.64

Oct 12, 2007

Page 34 of 373

Under development

Preliminary Specification

Specification in this preliminary version is subject to change.

M16C/64 Group

5. Reset

NOTE:

Shown here is the valid pin state when the internal power supply voltage has stabilized after power

on. When CNVSS = VCC1, the pin state is indeterminate until the internal power supply voltage sta-

bilizes.

Apply a “H” signal.

Table 5.1

Pin Status When

RESET Pin Level is “L”

Pin Name

Status

CNVSS = VSS

CNVSS = VCC1 (1)

BYTE = VSS

BYTE = VCC1

Input port

Data input

Input port

Data input

Input port

P2, P3, P4_0 to P4_3 Input port

Address output (undefined)

P4_4

Input port

CS0 output (“H” is output)

P4_5 to P4_7

Input port

Input port (pulled high)

P5_0

Input port

WR output (“H” is output)

P5_1

Input port

BHE output (undefined)

P5_2

Input port

RD output (“H” is output)

P5_3

Input port

BCLK output

P5_4

Input port

HLDA output (The output

value

depends on the input to the

HOLD pin)

HLDA output (The output

value

depends on the input to the

HOLD pin)

P5_5

Input port

HOLD input (2)

P5_6

Input port

ALE output (“L” is output)

P5_7

Input port

RDY input

P6, P7, P8, P9, P10

Input port

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