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R5F3640MNFB Datasheet(PDF) 71 Page - Renesas Technology Corp |
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R5F3640MNFB Datasheet(HTML) 71 Page - Renesas Technology Corp |
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71 / 398 page  REJ09B0392-0064 Rev.0.64 Oct 12, 2007 Page 50 of 373 Under development Preliminary Specification Specification in this preliminary version is subject to change. M16C/64 Group 7. Processor Mode Figure 7.3 PRG2C Register b7 0 b6 b5 b4 b1 b2 b3 Program 2 Area Control Register (1) Symbol PRG2C(1) Address 0010h Bit Symbol Bit Name RW PRG2C After Reset XXXXXXX0h RW b0 Function — (b7-b2) — No register bits. If necessary, set to 0. Read as undefined value 0 : Enable program ROM 2 1 : Disable program ROM 2 Set to 0 RW — (b1) Program ROM 2 disable bit Reserved bit NOTE : 1. Write to this register after setting the PRC6 bit in the PRCR register to 1 (write enabled). |
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