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R5F3640MNFB Datasheet(PDF) 38 Page - Renesas Technology Corp |
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R5F3640MNFB Datasheet(HTML) 38 Page - Renesas Technology Corp |
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38 / 398 page ![]() REJ09B0392-0064 Rev.0.64 Oct 12, 2007 Page 17 of 373 Under development Preliminary Specification Specification in this preliminary version is subject to change. M16C/64 Group 3. Memory 3. Memory Figure 3.1 is a memory map of the M16C/64 Group. The M16C/64 Group has 1 Mbyte address space from address 00000h to FFFFFh. The internal ROM is flash memory. Program ROM 1 is allocated from address FFFFFh to lower. For example, a 64-Kbyte program ROM 1 is addressed from F0000h to FFFFFh. An 8-Kbyte data flash is addressed from 0E000h to 0FFFFh. This data flash space is used not only for data storage but also for pro- gram storage. Program ROM 2 is allocated addresses 10000h to 13FFFh. The user boot code area is assigned addresses 13FF0h to 13FFFh in the program ROM 2. The fixed interrupt vectors are addressed from FFFDCh to FFFFFh. They store the starting address of each interrupt routine. The internal RAM is allocated from address 00400h to higher. For example, a 10-Kbyte internal RAM is addressed from 00400h to 02BFFh. The internal RAM is used not only for data storage but also for stack area when subroutines are called or when interrupt request are acknowledged. SFRs are allocated from address 00000h to 003FFh and from 0D000h to 0D7FFh. Peripheral function con- trol registers are located here. All blank spaces within SFRs are reserved and cannot be accessed by users. The special page vectors are addressed from FFE00h to FFFD7h. They are used for the JMPS instruction and JSRS instruction. Refer to the M16C/60, M16C/20 Series Software Manual for details. In memory expansion mode or microprocessor mode, some spaces are reserved and cannot be accessed by users. Figure 3.1 Memory Map NOTES: 1. This memory map is based on the case that the PM10 bit in the PM1 register is 1, the PM13 bit in the PM1 register is 1, and the PRG2C0 bit in the PRG2C register is 0. 2. Available as external area in microprocessor mode. Internal RAM Reserved area 00000h XXXXXh 0D000h SFR 00400h SFR 0D800h Internal ROM (data flash) 0E000h Internal ROM (program ROM 2) 10000h External area Reserved area (2) Internal ROM (program ROM 1) 14000h 80000h YYYYYh FFFFFh Reserved area 28000h 27000h Reset Watchdog timer Single step Address match BRK instruction Overflow Undefined instruction Special page vector table FFFFFh FFFDCh FFE00h DBC NMI Size Address YYYYYh Size Address XXXXXh Internal RAM Internal ROM 128 Kbytes E0000h 12 Kbytes 033FFh 256 Kbytes C0000h 16 Kbytes 043FFh 512 Kbytes 80000h 31 Kbytes 07FFFh Reserved area External area External area FFFD8h 13FFFh 13FF0h User boot code area |
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