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R5F3640MNFB Datasheet(PDF) 72 Page - Renesas Technology Corp |
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R5F3640MNFB Datasheet(HTML) 72 Page - Renesas Technology Corp |
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72 / 398 page ![]() REJ09B0392-0064 Rev.0.64 Oct 12, 2007 Page 51 of 373 Under development Preliminary Specification Specification in this preliminary version is subject to change. M16C/64 Group 7. Processor Mode 7.3 Internal Memory The internal RAM can be used in all processor modes. The range of the internal RAM depends on the set- ting of the PM 13 bit in the PM1 register. The internal ROM is used in single-chip mode and memory expansion mode. Three internal ROMs are available: data flash, program ROM 2, and program ROM 1. Data flash includes block A (addresses 0E000h to 0EFFFh) and block B (addresses 0F000h to 0FFFFh). When data flash is selected by the setting of the PM10 bit in the PM1 register, both block A and block B can be used. Table 7.4 shows Data Flash (addresses 0E000h to 0FFFFh). Set the PRG2C0 bit in the PRG2C register to select program ROM 2. Table 7.5 shows Program ROM 2 (addresses 10000h to 13FFFh). Do not use the last 16 bytes (addresses 13FF0h to 13FFFh) when using program ROM 2 in single-chip mode or memory expansion mode. These bytes are assigned as the user boot code area (refer to 22.1.2 “User Boot Function” ). The range of program ROM 1 depends on the setting of the PM13 bit in the PM1 register. Figure 7.4 indi- cates the Memory Map in Single-Chip Mode. Table 7.4 Data Flash (addresses 0E000h to 0FFFFh) PM10 Bit in PM1 Register 0 1 Processor Modes Single-chip mode Unusable Data flash Memory expansion mode External area Data flash Microprocessor mode External area Reserved area Table 7.5 Program ROM 2 (addresses 10000h to 13FFFh) PRG2C0 bit in PRG2C Register 0 1 Processor Modes Single-chip mode Program ROM 2 Unusable Memory expansion mode Program ROM 2 External area Microprocessor mode Reserved area External area |
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