SN8F5708 datasheet(101/204 Pages) SONIX

101 / 204 page

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SN8F5708 Series

PWM

Datasheet Rev. 2.4

101

PWM cycle and resolution. PWnC keeps counting, and the system compares PWnC and PWnD.

When PWnC = PWnD, the PWM output status exchanges to low PWnC keeps counting. When PWM

timer overflow occurs (PWnY-1 to PWnY), and one cycle of PWM signal finishes. PWnC is reloaded

from 0x0000 automatically, and PWM output status exchanges to high for next cycle. PWnD

decides the high duty duration, and PWnY decides the resolution and cycle of PWM. PWnD can’t

be larger than PWnY, or the PWM signal is error. PWM clock source is fosc, PWnRATE[2:0] bits: 000

= fosc/128, 001 = fosc/64, 010 = fosc/32, 011 = fosc/16, 100 = fosc/8, 101 = fosc/4, 110 = fosc/2,

111 = fosc/1.

PWnC

...

PWn

D-2

PWn

D-1

PWn

PWM Output

...

PWn

Y-3

PWn

Y-2

PWn

Y-1

...

Enable PWn .

PWnC is 0x0000.

PWM outputs high status.

PWnC = PWnD.

PWM exchanges to low status.

PWnC overflows from PWnY-1 to PWnY.

PWnC is loaded from 0x0000.

PWM exchanges to high status.

One complete cycle of PWM.

Next cycle.

PWM Period = PWnY

PWM duty = (PWnD): (PWnY-PWnD)

PWM Output

PWnEN=1 outputs PWM signal

PWnEN=0. The pin exchanges

to last GPIO mode (output low).

PWnEN=1

PWnEN=0

PWM Output

PWnEN=0. The pin exchanges

to last GPIO mode (output high).

PWnEN=1

PWnEN=0

PWM Output

PWnEN=0. The pin exchanges

to last GPIO mode (input).

PWnEN=1

PWnEN=0

High impendence (floating)

PWnEN=1 outputs PWM signal

16.2

One Pulse PWM

When PWnPO = 0, PWn is PWM function mode. When PWnPO = 1 and PWnEN = 1, PWn will

output one pulse PWM function and the PWMnF is issued as PWn counter overflow. PWnEN bit is

cleared automatically and pulse output pin returns to idle status. To output next pulse is to set

PWnEN bit by program again. One pulse PWM channels selected by PWCH[1:0] bits. PWMn0,

PWMn1 are output pins. The PWMn0, PWMn1 output pins are shared with GPIO pin controlled by

SN8F5708 Datasheet(PDF) 101 Page - SONiX Technology Company

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