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71M6541D/F/G Datasheet(PDF) 160 Page - Maxim Integrated Products |
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71M6541D/F/G Datasheet(HTML) 160 Page - Maxim Integrated Products |
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160 / 166 page ![]() 71M6541D/F/G and 71M6542F/G Data Sheet 160 Rev 5 6.9.2 Analog Pins Table 120: Analog Pins Pin (64 pin) Pin (100-pin) Name Type Circuit Description 55 54 44 43 87 86 68 67 IAP- IAN IBP- IBN I 6 Differential or single-ended Line Current Sense Inputs: These pins are voltage inputs to the internal A/D converter. Typically, they are connected to the outputs of current sensors. Unused pins must be tied to V3P3A. Pins IBP-IBN may be configured for communication with the remote sensor interface (71M6x01). When RMT_E = 1 (I/O RAM 0x2709[3]), the IBP-IBN pins become balanced differential pair. If unused, RMT_E must be zero and IBP-IBN must tied to V3P3A. 52 -- 82 83 VA VB † I 6 Line Voltage Sense Inputs: These pins are voltage inputs to the internal A/D converter. Typically, they are connected to the outputs of resistor dividers. Unused pins must be tied to V3P3A. 56 88 VREF O 9 Voltage Reference for the ADC. This pin should be left unconnected (floating). 48 49 75 76 XIN XOUT I O 8 Crystal Inputs: A 32 kHz crystal should be connected across these pins. Typically, a 15 pF capacitor is also connected from XIN to GNDA and a 10 pF capacitor is connected from XOUT to GNDA. It is important to minimize the capacitance between these pins. See the crystal manufacturer datasheet for details. If an external clock is used, a 150 mV (p-p) clock signal should be applied to XIN, and XOUT should be left unconnected. † Pin VB only available on 71M6542F/G. |
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